LTM4603/LTM4603-1
15
4603fb
Run Enable
The RUN pin is used to enable the power module. The
pin has an internal 5.1V Zener to ground. The pin can be
driven with a logic input not to exceed 5V.
The RUN pin can also be used as an undervoltage lock out
(UVLO) function by connecting a resistor divider from the
input supply to the RUN pin:
V
UVLO
=
R1
R2
R2
• 1.5V
See the Simplified Block Diagram (Figure 1).
Power Good
The PGOOD pin is an open-drain pin that can be used to
monitor valid output voltage regulation. This pin monitors
a ±10% window around the regulation point and tracks
with margining.
COMP Pin
This pin is the external compensation pin. The module has
already been internally compensated for most output volt-
ages. Table 2 is provided for most application requirements.
LTpowerCAD is available for control loop optimization.
PLLIN
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of an external clock. The
frequency range is ±30% around the operating frequency
of 1MHz. A pulse detection circuit is used to detect a clock
on the PLLIN pin to turn on the phase-locked loop. The
pulse width of the clock has to be at least 400ns and the
amplitude at least 2V. The PLLIN pin must be driven from a
low impedance source such as a logic gate located close to
the pin. During start-up of the regulator, the phase-locked
loop function is disabled.
INTV
CC
and DRV
CC
Connection
An internal low dropout regulator produces an internal
5V supply that powers the control circuitry and DRV
CC
for driving the internal power MOSFETs. Therefore, if
the system does not have a 5V power rail, the LTM4603
can be directly powered by Vin. The gate driver current
through the LDO is about 20mA. The internal LDO power
dissipation can be calculated as:
P
LDO_LOSS
= 20mA • (V
IN
– 5V)
The LTM4603 also provides the external gate driver voltage
pin DRV
CC
. If there is a 5V rail in the system, it is recom-
mended to connect the DRV
CC
pin to the external 5V rail.
This is especially true for higher input voltages. Do not
apply more than 6V to the DRV
CC
pin. A 5V output can be
used to power the DRV
CC
pin with an external circuit as
shown in Figure 16.
Parallel Operation of the Module
The LTM4603 device is an inherently current mode con-
trolled device. Parallel modules will have very good current
sharing. This will balance the thermals on the design. The
voltage feedback equation changes with the variable n as
modules are paralleled:
V
OUT
= 0.6V
60.4k
n
+ R
FB
R
FB
or equivalently,
R
FB
=
60.4k
n
V
OUT
− 1
where n is the number of paralleled modules.
Thermal Considerations and Output Current Derating
The power loss curves in Figures 7 and 8 can be used
in coordination with the load current derating curves in
Figures 9 to 12, and Figures 13 to 14 for calculating an
approximate θ
JA
for the module with various heat sinking
methods. Thermal models are derived from several tem-
perature measurements at the bench and thermal modeling
analysis. Thermal Application Note 103 provides a detailed
explanation of the analysis for the thermal models and the
derating curves. Tables 3 and 4 provide a summary of the
equivalent θ
JA
for the noted conditions. These equivalent
θ
JA
parameters are correlated to the measured values,
applications inForMation
