3
AT49BV1604A(T)/1614A(T)
1411F–FLASH–03/02
The device powers on in the read mode. Command sequences are used to place the device in
other operation modes such as program and erase. The device has the capability to protect
the data in any sector (see Sector Lockdown section).
The device is segmented into two memory planes. Reads from memory plane B may be per-
formed even while program or erase functions are being executed in memory plane A and vice
versa. This operation allows improved system performance by not requiring the system to wait
for a program or erase operation to complete before a read is performed. To further increase
the flexibility of the device, it contains an Erase Suspend feature. This feature will put the
erase on hold for any amount of time and let the user read data from or program data to any of
the remaining sectors within the same memory plane. There is no reason to suspend the
erase operation if the data to be read is in the other memory plane. The end of a program or
an erase cycle is detected by the Ready/Busy
pin, Data Polling or by the toggle bit.
The VPP pin provides faster program/erase times. With V
PP
at 5.0V or 12.0V, the program and
erase operations are accelerated.
A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement
of entering the three-byte program sequence is offered to further improve programming time.
After entering the six-byte code, only single pulses on the write control lines are required for
writing into the device. This mode (Single Pulse Byte/Word Program) is exited by powering
down the device, or by pulsing the RESET
pin low for a minimum of 500 ns and then bringing
it back to V
CC
. Erase and Erase Suspend/Resume commands will not work while in this mode;
if entered they will result in data being programmed into the device. It is not recommended that
the six-byte code reside in the software of the final product but only exist in external program-
ming code.
When using the AT49BV1604A(T) pinout configuration, the device always operates in the
word mode. In the AT49BV/LV1614A(T) configuration, the BYTE
pin controls whether the
device data I/O pins operate in the byte or word configuration. If the BYTE
pin is set at logic
“1”, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE
and OE.
If the BYTE
pin is set at logic “0”, the device is in byte configuration, and only data I/O pins
I/O0 - I/O7 are active and controlled by CE
and OE. The data I/O pins I/O8 - I/O14 are tri-
stated, and the I/O15 pin is used as an input for the LSB (A-1) address function.
