ISL9011AIRMGZ

7
FN6437.2
September 1, 2015
FIGURE 13. LINE TRANSIENT RESPONSE, 3.3V OUTPUT FIGURE 14. LINE TRANSIENT RESPONSE, 2.8V OUTPUT
FIGURE 15. LOAD TRANSIENT RESPONSE
FIGURE 16. PSRR vs FREQUENCY
FIGURE 17. SPECTRAL NOISE DENSITY vs FREQUENCY
Typical Performance Curves (Continued)
400µs/DIV
VO1 = 3.3V
I
LOAD
= 150mA
3.6V
4.3V
10mV/DIV
C
LOAD
= 1μF
C
BYP
= 0.01μF
V
O
1 = 3.3V
I
LOAD
= 150mA
3.6V
4.3V
10mV/DIV
C
LOAD
= 1µF
C
BYP
= 0.01µF
400µs/DIV
VO2 = 2.8V
I
LOAD
= 300mA
3.5V
4.2V
10mV/DIV
C
LOAD
= 1µF
C
BYP
= 0.01µF
400µs/DIV
V
O
2 = 2.8V
I
LOAD
= 300mA
3.5V
4.2V
10mV/DIV
C
LOAD
= 1µF
C
BYP
= 0.01µF
100µs/DIV
V
O
(25mV/DIV)
I
LOAD
300mA
100µA
V
IN
= 2.8V
V
O
= 1.8V
0.1 1k 10k 100k 1M
FREQUENCY (Hz)
0
10
20
30
40
50
60
70
80
90
100
PSRR (dB)
V
IN
= 3.6V
V
O
= 1.8V
I
O
= 10mA
C
BYP
= 0.1µF
C
LOAD
= 1µF
SPECTRAL NOISE DENSITY (nV/Hz)
1000
100
10
1
0.1
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
V
IN
= 3.6V
V
O
= 1.8V
I
LOAD
= 10mA
C
BYP
= 0.1µF
C
IN
= 1µF
C
LOAD
= 1µF
ISL9011A
8
FN6437.2
September 1, 2015
Typical Application
Pin Descriptions
PIN
NUMBER
PIN
NAME TYPE DESCRIPTION
1 VIN Analog I/O Supply Voltage/LDO Input:
Connect a 1µF capacitor to GND.
2 EN1 Low Voltage Compatible
CMOS Input
LDO-1 Enable.
3 EN2 Low Voltage Compatible
CMOS Input
LDO-2 Enable.
4 CBYP Analog I/O Reference Bypass Capacitor Pin: Optionally connect capacitor of value 0.01µF to 1µF
between this pin and GND to tune in the desired noise and PSRR performance.
5, 7, 8 NC NC No Connection
6 GND Ground GND is the connection to system ground. Connect to PCB Ground plane.
9VO2
Analog I/O LDO-2 Output: Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
10 VO1 Analog I/O LDO-1 Output: Connect capacitor of value 1µF to 10µF to GND (1µF recommended).
C1, C3, C4: 1µF X5R CERAMIC CAPACITOR
C2: 0.1µF X5R CERAMIC CAPACITOR
ISL9011A
VIN
EN1
EN2
CBYP
NC
VO1
VO2
NC
NC
GND
10
9
8
7
6
1
2
3
4
5
VIN (2.3V TO 6.5V)
ENABLE 1
ENABLE 2
VOUT 1
VOUT 2
C1 C2 C3 C4
OFF
ON
OFF
ON
ISL9011A
9
FN6437.2
September 1, 2015
Block Diagram
Functional Description
The ISL9011A contains all circuitry required to implement
two high performance LDOs. High performance is achieved
through a circuit that delivers fast transient response to
varying load conditions. In a quiescent condition, the
ISL9011A adjusts its biasing to achieve the lowest standby
current consumption.
The device also integrates current limit protection, smart
thermal shutdown protection, staged turn-on and soft-start.
Smart Thermal shutdown protects the device against
overheating. Staged turn-on and soft-start minimize start-up
input current surges without causing excessive device
turn-on time.
Power Control
The ISL9011A has two separate enable pins (EN1 and EN2)
to individually control power to each of the LDO outputs.
When both EN1 and EN2 are low, the device is in shutdown
mode. During this condition, all on-chip circuits are off, and
the device draws minimum current, typically less than 0.1µA.
When one or both of the enable pins are asserted, the
device first polls the output of the UVLO detector to ensure
that VIN voltage is at least about 2.1V. Once verified, the
device initiates a start-up sequence. During the start-up
sequence, trim settings are first read and latched. Then,
sequentially, the bandgap, reference voltage and current
generation circuitry power-up. Once the references are
stable, a fast-start circuit quickly charges the external
reference bypass capacitor (connected to the CBYP pin) to
the proper operating voltage. After the bypass capacitor has
been charged, the LDO’s power-up.
If EN1 is brought high, and EN2 goes high before the VO1
output stabilizes, the ISL9011A delays the VO2 turn-on until
the VO1 output reaches its target level.
If EN2 is brought high, and EN1 goes high before VO2 starts
its output ramp, then VO1 turns on first and the ISL9011A
LDO
ERROR
AMPLIFIER
IS1
1V
QEN1
LDO-1
LDO-2
VREF
TRIM
VIN
VO1
VO2
CBYPGND
EN2
EN1
CONTROL
LOGIC
VOLTAGE
REFERENCE
GENERATOR
BANDGAP AND
TEMPERATURE
SENSOR
UVLO
1.00V
IS1
IS2
QEN1
QEN2
VO1
~1.0V
ISL9011A

ISL9011AIRMGZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
LDO Voltage Regulators W/ANNEAL LW NOISE HI PSRRLDO 10LD 3X3
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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