LC05112CMT
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Description of operation
(1) Normal mode
LC05112CMT controls charging and discharging by detecting cell voltage (VCC) and controls S2-S1
current. In case that cell voltage is between over-discharge detection voltage (Vuv) and over-charge
detection voltage (Vov), and S2-S1 current is between charge over-current detection current (Ioch) and
discharge over-current detection current (Ioc), internal power MOS FETs as CHG_SW, DCHG_SW are all
turned ON.
This is the normal mode, and it is possible to be charged and discharged.
(2) Over-charging mode
Internal power MOS FET as CHG_SW will be turned off if cell voltage will get equal to or higher than
over-charge detection voltage (Vov) over the delay time of over-charging (Tov).
This is the over-charging detection mode.
The recovery from over-charging will be made after the following three conditions are all satisfied.
a. Charger is removed from IC.
b. CS pin voltage will get equal to or higher than discharge over-current detection current (Ioc) due to load
connected
c. Cell voltage will get lower than over-charge release voltage (Vovr) over the delay time of over-charging
release (Tovr) due to discharging through load.
Consequently, internal power MOS FET as CHG_SW will be turned on and normal mode will be resumed.
In over-charging mode, discharging over-current detection is made only when CS pin will get higher than
discharging over-current detection current 2(Ioc2), because discharge current flows through parasitic
diode of CHG_SW FET.
If CS pin voltage will get higher than discharging over-current detection current 2 (Ioc2) over the delay time
of discharging over-current 2 (Toc2), discharging will be shut off, because internal power FETs as
DCHG_SW is turned off.(short-circuit detection mode)
After detecting short-circuit, CS pin will be pulled down to Vss by internal resistor Rcsd.
The recovery from short circuit detection in over-charging mode will be made after the following two
conditions are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current detection current 2 (Ioc2) due to
CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and over-charging detection
mode will be resumed.
(3) Over-discharging mode
If cell voltage will get lower than over-discharge detection voltage (Vuv) over the delay time of
over-discharging (Tuv), discharging will be shut off, because internal power FETs as DCHG_SW is turned
off.
This is the over-discharging mode.
After detecting over-discharging, CS pin will be pulled up to Vcc by internal resistor Rcsu and the bias of
internal circuits will be shut off. (Stand-by mode)
In stand-by mode, operating current is suppressed under 0.95uA (max).
The recovery from stand-by mode will be made by internal circuits biased after the following two conditions
are satisfied.
a. Charger is connected.
By continuing to be charged, if cell voltage will get higher than over-discharge detection voltage (Vuvr) over
the delay time of over-discharging (Tuvr), internal power MOS FETs as DCHG_SW is turned on and normal
mode will be resumed.
In over-discharge detection mode, charging over-current detection does not operate.
By continuing to be charged, charging over-current detection starts to operate after cell voltage goes up
more than over-discharge release voltage (Vuvr).
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(4) Discharging over-current detection mode 1
Internal power MOS FET as DCHG_SW will be turned off and discharging current will be shut off if CS pin
voltage will get equal to or higher than discharging over-current detection current (Ioc) over the delay time
of discharging over-current (Toc1).
This is the discharging over-current detection mode 1.
In discharging over-current detection mode 1, CS pin will be pulled down to Vss with internal resistor Rcsd.
The recovery from discharging over-current detection mode will be made after the following two conditions
are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current release current (Iocr) over the
delay time of discharging over-current release (Tocr1) due to CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and normal mode will be
resumed.
(5) Discharging over-current detection mode 2 (short circuit detection)
Internal power MOS FET as DCHG_SW will be turned off and discharging current will be shut off if CS pin
voltage will get equal to or higher than discharging over-current detection current2 (Ioc2) over the delay
time of discharging over-current 2 (Toc2).
This is the short circuit detection mode.
In short circuit detection mode, CS pin will be pulled down to Vss by internal resistor Rcsd.
The recovery from short circuit detection mode will be made after the following two conditions are satisfied.
a. Load is removed from IC.
b. CS pin voltage will get equal to or lower than discharging over-current release current (Iocr) over the
delay time of discharging over-current release (Tocr1) due to CS pin pulled down through Rcsd.
Consequently, internal power MOS FET as DCHG_SW will be turned on, and normal mode will be
resumed.
(6) Charging over-current detection mode
Internal power MOS FET as CHG_SW will be turned off and charging current will be shut off if CS pin
voltage will get equal to or lower than charging over-current detection current (Ioch) over the delay time of
charging over-current (Toch).
This is the charging over-current detection mode.
The recovery from charging over-current detection mode will be made after the following two conditions is
satisfied.
a. Charger is removed from IC and CS pin will get higher by load connected.
b. CS pin voltage will get equal to or higher than charging over-current release current (Iochr) over the
delay time of charging over-current release (Tocrh).
Consequently, internal power MOS FET as CHG_SW will be turned on, and normal mode will be resumed.
*Internal current flows out through CS and S2 terminals.
After charger is removed, it flows through parasitic diode of CHG_SW FET.
Therefore, CS pin voltage will go up more than charging over-current release current (Iochr).
So CS pin voltage is not an indispensable condition for recovery from charging over-current detection.
(7)
0V battery charge inhibition function
When the battery (0 V battery) of internal short-circuit is connected, it is the function to forbid charge.
When battery voltage is below typ.0.9 V, the gate of FET for charge control is fixed to the PAC-terminal
voltage, and charge is forbidden.
It can charge, when battery voltage is more than 0 V battery charge prohibition battery voltage (Vinh).
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Timing Chart
Over-charge detection/release, Over-discharge detection/release (connect charger)

LC05112C01MTTTG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Battery Management 1 CELL LIB PROTECTIO
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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