LTC3633A/LTC3633A-1
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APPLICATIONS INFORMATION
A reasonable starting point is to choose a ripple current
that is about 40% of I
OUT(MAX)
. Note that the largest
ripple current occurs at the highest V
IN
. Exceeding 60%
of I
OUT(MAX)
is not recommended. To guarantee that
ripple current does not exceed a specified maximum, the
inductance should be chosen according to:
L =
V
OUT
f I
L(MAX)
1
V
OUT
V
IN(MAX)
The inductor ripple current also must not be so large that
its valley current level exceeds the negative current limit,
which can be as small as –1.2A. If the negative current
limit is exceeded while the part is in the forced continu
-
ous mode of operation, V
OUT
can get charged up to above
its regulation level – until the inductor current no longer
exceeds the negative current limit. In such instances,
choose a larger inductor value to reduce the inductor
ripple current. The alternative is to reduce the inductor
ripple current by decreasing the R
T
resistor value which
will increase the switching frequency.
Once the value for L is known, the type of inductor must
be selected. Actual core loss is independent of core size
for a fixed inductor value, but is very dependent on the
inductance selected. As the inductance increases, core
losses decrease. Unfortunately, increased inductance
requires more turns of wire, leading to increased DCR
and copper loss.
Ferrite designs exhibit very low core loss and are pre
-
ferred at high switching frequencies, so design goals
can concentrate on copper loss and preventing satura-
tion. Ferrite core material saturates “hard”, which means
that
inductance collapses abruptly when the peak design
current is exceeded. This results in an abrupt increase in
inductor ripple current, so it is important to ensure that
the core will not saturate.
Different core materials and shapes will change the size/cur
-
rent and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and
don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
characteristics. The choice of which style inductor to use
mainly depends on the price versus size requirements
and any radiated field/EMI requirements. Table 1 gives a
sampling of available surface mount inductors.
Table 1. Inductor Selection Table
INDUCTANCE
(µH)
DCR
(m
Ω)
MAX
CURRENT
(A)
DIMENSIONS
(mm)
HEIGHT
(mm)
Würth Electronik WE-HC 744312 Series
0.25
0.47
0.72
1.0
1.5
2.
5
3.
4
7.5
9.5
10.5
18
16
12
11
9
7 × 7.7 3.8
Vishay IHLP-2020BZ-01 Series
0.22
0.33
0.47
0.68
1
5.2
8.
2
8.8
12.4
20
15
12
11.5
10
7
5.2 × 5.5 2
Toko FDV0620 Series
0.20
0.47
1.0
4.5
8.
3
18.3
12.4
9.0
5.7
7 × 7.7 2.0
Coilcraft D01813H Series
0.33
0.56
1.2
4
10
17
10
7.7
5.3
6 ×
8.9 5.0
TDK RLF7030 Series
1.0
1.5
8.8
9.
6
6.4
6.1
6.9 × 7.3 3.2
C
IN
and C
OUT
Selection
The input capacitance, C
IN
, is needed to filter the trapezoi-
dal wave current at the drain of the top power MOSFET.
To prevent large voltage transients from occurring, a low
ESR input capacitor sized for the maximum RMS current is
recommended. The maximum RMS current is given by:
I
RMS
=I
OUT(MAX)
V
OUT
V
IN
V
OUT
( )
V
IN
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
I
OUT
/2. This simple worst case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that ripple current ratings
from capacitor manufacturers are often based on only
2000 hours of life which makes it advisable to further de-
rate the capacitor, or choose a capacitor rated at a higher
temperature than required.
LTC3633A/LTC3633A-1
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APPLICATIONS INFORMATION
Several capacitors may also be paralleled to meet size or
height requirements in the design. For low input voltage
applications, sufficient bulk input capacitance is needed
to minimize transient effects during output load changes.
Even though the LTC3633A design includes an overvoltage
protection circuit, care must always be taken to ensure
input voltage transients do not pose an overvoltage hazard
to the part.
The selection of C
OUT
is determined by the effective series
resistance (ESR) that is required to minimize voltage ripple
and load step transients as well as the amount of bulk
capacitance that is necessary to ensure that the control
loop is stable. Loop stability can be checked by viewing
the load transient response. The output ripple, ∆V
OUT
, is
approximated by:
V
OUT
< I
L
ESR +
1
8 • f C
OUT
When using low-ESR ceramic capacitors, it is more useful
to choose the output capacitor value to fulfill a charge stor-
age requirement. During a load step, the output capacitor
must instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is
dependent on the compensation and the
output capacitor size. Typically, 3 to 4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, V
DROOP
, is
usually about 3 times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
C
OUT
3 I
OUT
f • V
DROOP
Though this equation provides a good approximation, more
capacitance may be required depending on the duty cycle
and load step requirements. The actual V
DROOP
should be
verified by applying a load step to the output.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are available
in small case sizes. Their high ripple current, high voltage
rating and low ESR make them ideal for switching regula
-
tor applications. However, due to the self-resonant and
high-Q
characteristics of
some types of ceramic capaci-
tors, care must be taken when these capacitors are used
a
t
the input. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
V
IN
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at V
IN
large enough to damage the part. For
a more detailed discussion, refer to Application Note 88.
When choosing the input and output ceramic capacitors,
choose the X5R and X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac
-
teristics of all the ceramics for a given value and size.
INT
V
CC
Regulator Bypass Capacitor
An internal low dropout (LDO) regulator draws power
from the V
IN1
input and produces the 3.3V supply that
powers the internal bias circuitry and drives the gate of
the internal MOSFET switches. The INTV
CC
pin connects
to the output of this regulator and must have a minimum
of 1µF ceramic decoupling capacitance to ground. The
decoupling capacitor should have low impedance electrical
connections to the INTV
CC
and PGND pins to provide the
transient currents required by the LTC3633A. This supply
is intended only to supply additional DC load currents as
desired and not intended to regulate large transient or AC
behavior, as this may impact LTC3633A operation.
Boost Capacitor
The LTC3633A uses a “bootstrap” circuit to create a voltage
rail above the applied input voltage V
IN
. Specifically, a boost
capacitor, C
BOOST
, is charged to a voltage approximately
equal to INTV
CC
each time the bottom power MOSFET is
turned on. The charge on this capacitor is then used to
supply the required transient current during the remainder
of the switching cycle. When the top MOSFET is turned on,
the BOOST pin voltage will be equal to approximately V
IN
+ 3.3V. For most applications, a 0.1µF ceramic capacitor
closely connected between the BOOST and SW pins will
provide adequate performance.
LTC3633A/LTC3633A-1
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Figure 2. Setting the Output Voltage
FB
R2
R1
C
F
3633a F02
V
OUT
SGND
LTC3633A
APPLICATIONS INFORMATION
Low Power 2.5V Linear Regulator
The V2P5 pin can be used as a low power 2.5V regulated
rail. This pin is the output of a 10mA linear regulator
powered from the INTV
CC
pin. Note that the power from
V2P5 eventually comes from V
IN1
since the INTV
CC
power
is supplied from V
IN1
. When using this output, this pin
must be bypassed with a 1µF ceramic capacitor. If this
output is not being used, it is recommended to short this
output to INTV
CC
to disable the regulator.
Output Voltage Programming
Each regulators output voltage is set by an external resis
-
tive divider according to the following equation:
V
OUT
= 0.6V 1+
R2
R1
The desired output voltage is set by appropriate selection
of resistors R1 and R2 as shown in Figure 2. Choosing
large values for R1 and R2 will result in improved zero-
load efficiency but may lead to undesirable noise coupling
or phase margin reduction due to stray capacitances
at the V
FB
node. Care should be taken to route the V
FB
trace away from any noise source, such as the SW trace.
To improve the frequency response of the main control
loop, a feedforward capacitor, C
F
, may be used as shown
in Figure 2.
Connecting the V
ON
pin to the output voltage makes the
on-time proportional the output voltage and allows the
internal on-time servo loop to lock the converters switching
frequency to the programmed value. If the output voltage
is outside the V
ON
sense range (0.6V – 6V for LTC3633A,
1.5V – 12V for LTC3633A-1), the output voltage will stay
in regulation, but the switching frequency may deviate
from the programmed frequency.
Minimum Off-Time/On-Time Considerations
The minimum off-time is the smallest amount of time that
the LTC3633A can turn on the bottom power MOSFET,
trip the current comparator and turn the power MOSFET
back off. This time is typically 45ns. For the controlled
on-time architecture, the minimum off-time limit imposes
a maximum duty cycle of:
DC
(MAX)
= 1 f t
OFF(MIN)
+2 t
DEAD
( )
where f is the switching frequency, t
DEAD
is the nonoverlap
time, or “dead time” (typically 10ns), and t
OFF(MIN)
is the
minimum off-time. If the maximum duty cycle is surpassed,
due to a dropping input voltage for example, the output
will drop out of regulation. The minimum input voltage to
avoid this dropout condition is:
V
IN(MIN)
=
V
OUT
1 f t
OFF(MIN)
+2 t
DEAD
( )
Conversely, the minimum on-time is the smallest dura-
tion of time in which the top power MOSFET can be in
its “on” state. This time is typically 20ns. In continuous
mode operation, the minimum on-time limit imposes a
minimum duty cycle of:
DC
(MIN)
= f t
ON(MIN)
( )
where t
ON(MIN)
is the minimum on-time. As the equation
shows, reducing the operating frequency will alleviate the
minimum duty cycle constraint.
In the rare cases where the minimum duty cycle is
surpassed, the output voltage will still remain in regula
-
tion, but the switching frequency will decrease from its
programmed value. This constraint may not be of critical
importance in most cases, so high switching frequencies
may be used in the design without any fear of severe
consequences. As the sections on Inductor and Capacitor
selection show
, high switching frequencies allow the use
of
smaller board components, thus reducing the footprint
of the application circuit.

LTC3633AEUFD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual 3A, 20Vin, 4MHz, Monolithic Synchronous Step-Down Regulator
Lifecycle:
New from this manufacturer.
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