LTC3633A/LTC3633A-1
7
3633a1fb
For more information www.linear.com/LTC3633A
TYPICAL PERFORMANCE CHARACTERISTICS
Start-Up into Prebiased Output
(Forced Continuous Mode)
Load Step (Internal Compensation)
Start-Up into Prebiased Output
(Burst Mode Operation)
Start-Up (Burst Mode Operation)
T
J
= 25°C, V
IN1
= V
IN2
= 12V, f
SW
= 1MHz, L = 1µH
unless otherwise noted.
Start-Up (Forced Continuous Mode)
I
L
2A/DIV
20µs/DIV
3633a G19
V
OUT
AC-COUPLED
100mV/DIV
V
OUT
= 1.8V
I
LOAD
= 100mA to 3A
ITH = INTV
CC
I
L
2A/DIV
400µs/DIV
3633a G20
RUN
2V/DIV
V
OUT
1V/DIV
V
OUT
= 1.8V
C
SS
= 4.7nF
I
LOAD
= 150mA
I
L
1A/DIV
400µs/DIV
3633a G21
RUN
2V/DIV
V
OUT
1V/DIV
V
OUT
= 1.8V
C
SS
= 4.7nF
I
LOAD
= 150mA
I
L
1A/DIV
200µs/DIV
3633a G22
RUN
2V/DIV
V
OUT
1.8V
1V/DIV
I
LOAD
= 0mA
I
L
2A/DIV
1ms/DIV
3633a G22
RUN
2V/DIV
V
OUT
1.8V
1V/DIV
I
LOAD
= 0mA
LTC3633A/LTC3633A-1
8
3633a1fb
For more information www.linear.com/LTC3633A
PIN FUNCTIONS
PGOOD1 (Pin 1/Pin 4): Channel 1 Open-Drain Power
Good Output Pin. PGOOD1 is pulled to ground when the
voltage on the V
FB1
pin is not within ±8% (typical) of the
internal 0.6V reference. PGOOD1 becomes high imped-
ance once the V
FB1
pin returns to within ±5% (typical) of
the internal reference.
PHMODE (Pin 2/Pin 5): Phase Select Input. Tie this pin
to ground to force both channels to switch in phase. Tie
this pin to INTV
CC
to force both channels to switch 180°
out of phase. Do not float this pin.
RUN1 (Pin 3/Pin 6): Channel 1 Regulator Enable Pin.
Enables channel 1 operation by tying RUN1 above 1.22V.
Tying it below 1V places channel 1 into shutdown. Do not
float this pin.
MODE/SYNC (Pin 4/Pin 7): Mode Select and External
Synchronization Input. Tie this pin to ground to force
continuous synchronous operation at all output loads.
Floating this pin or tying it to INTV
CC
enables high effi-
ciency Burst Mode operation at light loads. Drive this pin
with a clock to synchronize the LTC3633A switching. An
internal phase-locked loop will for
ce the bottom power
NMOS’s turn on signal to be synchronized with the rising
edge of the CLKIN signal. When this pin is driven with a
clock, forced continuous mode is automatically selected.
RT (Pin 5/Pin 8): Oscillator Frequency Program Pin.
Connect an external resistor (between 80k to 640k) from
this pin to SGND in order to program the frequency from
500kHz to 4MHz. When RT is tied to INTV
CC
, the switching
frequency will default to 2MHz.
RUN2 (Pin 6/Pin 9): Channel 2 Regulator Enable Pin.
Enables channel 2 operation by tying RUN2 above 1.22V.
Tying it below 1V places channel 2 into shutdown. Do not
float this pin.
SGND (Pin 7/Pin 10): Signal Ground Pin. This pin should
have a low noise connection to reference ground. The
feedback resistor network, external compensation network,
and RT resistor should be connected to this ground.
PGOOD2 (Pin 8/Pin 11): Channel 2 Open-Drain Power
Good Output Pin. PGOOD2 is pulled to ground when the
voltage on the V
FB2
pin is not within ±8% (typical) of the
internal 0.6V reference. PGOOD2 becomes high imped-
ance once the V
FB2
pin returns to within ±5% (typical) of
the internal reference.
V
FB2
(Pin 9/Pin 12): Channel 2 Output Feedback Voltage
Pin. Input to the error amplifier that compares the feedback
voltage to the internal 0.6V reference voltage. Connect this
pin to a resistor divider network to program the desired
output voltage.
TRACKSS2 (Pin 10/Pin 13): Output Tracking and Soft-Start
Input Pin for Channel 2. Forcing a voltage below 0.6V on
this pin bypasses the internal reference input to the error
amplifier. The LTC3633A will servo the FB pin to the TRACK
voltage under this condition. Above 0.6V, the tracking func
-
tion stops and the internal reference resumes control of
the error amplifier. An internal 1.4µA pull up current from
INT
V
CC
allows a soft start function to be implemented by
connecting a capacitor between this pin and SGND.
ITH2 (Pin 11/Pin 14): Channel 2 Error Amplifier Output
and Switching Regulator Compensation Pin. Connect this
pin to appropriate external components to compensate
the regulator loop frequency response. Connect this pin
to INTV
CC
to use the default internal compensation.
V
ON2
(Pin 12/Pin 15): On-Time Voltage Input for Chan-
nel 2. This pin sets the voltage trip point for the on-time
comparator. T
ying this pin to the output voltage makes the
on-time proportional to V
OUT2
when V
OUT2
is within the
V
ON2
sense range (0.6V – 6V for LTC3633A, 1.5V – 12V for
LTC3633A-1). When V
OUT2
is outside the V
ON2
sense range,
the switching frequency may deviate from the programmed
frequency. The pin impedance is nominally 140kΩ.
SW2 (Pins 13, 14/Pins 16, 17): Channel 2 Switch Node
Connection to External Inductor. Voltage swing of SW is
from a diode voltage drop below ground to V
IN
.
V
IN2
(Pins 15, 16/Pins 18, 19): Power Supply Input for
Channel 2. Input voltage to the on chip power MOSFETs
on channel 2. This input is capable of operating from a
different supply voltage than V
IN1
.
BOOST2 (Pin 17/Pin 20): Boosted Floating Driver Supply
for Channel 2. The (+) terminal of the bootstrap capacitor
connects to this pin while the (–) terminal connects to
the SW pin. The normal operation voltage swing of this
pin ranges from a diode voltage drop below INTV
CC
up
to V
IN
+INTV
CC
.
(QFN/TSSOP)
LTC3633A/LTC3633A-1
9
3633a1fb
For more information www.linear.com/LTC3633A
(QFN/TSSOP)
PIN FUNCTIONS
V2P5 (Pin 18/Pin 21): 2.5V Regulator Output. Outputs a
regulated 2.5V supply voltage capable of supplying 10mA.
Bypass this pin with a minimum of 1µF low ESR ceramic
capacitor. Tie this pin to INTV
CC
when this output is not
being used in the application.
INTV
CC
(Pin 19/Pin 22): Internal 3.3V Regulator Output.
The internal power drivers and control circuits are powered
from this voltage. The internal regulator is disabled when
both channel 1 and channel 2 are disabled with the RUN1/
RUN2 inputs. Decouple this pin to power ground with a
minimum of 1µF low ESR ceramic capacitor.
BOOST1 (Pin 20/Pin 23): Boosted Floating Driver Supply
for Channel 1. The (+) terminal of the bootstrap capacitor
connects to this pin while the (–) terminal connects to
the SW pin. The normal operation voltage swing of this
pin ranges from a diode voltage drop below INTV
CC
up
to V
IN
+ INTV
CC
.
V
IN1
(Pins 21,22/Pins 24, 25): Power Supply Input for
Channel 1. Input voltage to the on chip power MOSFETs
on channel 1. The internal LDO for INTV
CC
is powered off
of this pin.
SW1 (Pins 23,24/Pins 26, 27): Channel 1 Switch Node
Connection to External Inductor. Voltage swing of SW is
from a diode voltage drop below ground to V
IN
.
V
ON1
(Pin 25/Pin 28): On-Time Voltage Input for Chan-
nel 1. This pin sets the voltage trip point for the on-time
comparator. T
ying this pin to the regulated output voltage
makes the on-time proportional to V
OUT1
when V
OUT1
is
within the V
ON1
sense range (0.6V – 6V for LTC3633A,
1.5V – 12V for LTC3633A-1). When V
OUT
is outside the
V
ON
sense range, the switching frequency may deviate
from the programmed frequency. The pin impedance is
nominally 140kΩ.
ITH1 (Pin 26/Pin 1): Channel 1 Error Amplifier Output and
Switching Regulator Compensation Pin. Connect this pin
to appropriate external components to compensate the
regulator loop frequency response. Connect this pin to
INTV
CC
to use the default internal compensation.
TRACKSS1 (Pin 27/Pin 2): Output Tracking and Soft-Start
Input Pin for Channel 1. Forcing a voltage below 0.6V on
this pin bypasses the internal reference input to the error
amplifier. The LTC3633A will servo the FB pin to the TRACK
voltage. Above 0.6V, the tracking function stops and the
internal reference resumes control of the error amplifier.
An internal 1.4µA pull up current from INTV
CC
allows a
soft-start function to be implemented by connecting a
capacitor between this pin and SGND.
V
FB1
(Pin 28/Pin 3): Channel 1 Output Feedback Voltage
Pin. Input to the error amplifier that compares the feedback
voltage to the internal 0.6V reference voltage. Connect this
pin to a resistor divider network to program the desired
output voltage.
PGND (Exposed Pad Pin 29/Exposed Pad Pin 29): Power
Ground Pin. The (–) terminal of the input bypass capaci
-
tor, C
IN
, and the (–) terminal of the output capacitor, C
OUT
,
should be tied to this pin with a low impedance connec-
tion. This pin must be soldered to the PCB to provide low
impedance electrical contact to power ground and good
thermal contact to the PCB.

LTC3633AEUFD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual 3A, 20Vin, 4MHz, Monolithic Synchronous Step-Down Regulator
Lifecycle:
New from this manufacturer.
Delivery:
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