Data Sheet SSM2220
Rev. C | Page 9 of 12
AD8671
2
3
1
8
4
10µF
+
+
0.01µF
0.01µF
10µF
+15V
–15V
V
OUT
LED
Q1
SSM2220
Q2
2N29007A
18
36
27
R1
250
V
IN
R2
27k
R3
5k
R4
5k
R6
100
R5
100
C1
50pF
THD < 0.005% 20Hz TO 20kHz
0.5nV/ Hz
1/f CORNER < 1Hz
03096-018
Figure 18. Low Noise Microphone Preamplifier
LOW NOISE MICROPHONE PREAMPLIFIER
Figure 18 shows a microphone preamplifier that consists of an
SSM2220 and a low noise op amp. The input stage operates at a
relatively high quiescent current of 2 mA per side, which reduces
the SSM2220 transistor voltage noise. The 1/f corner is less than
1 Hz. Total harmonic distortion is under 0.005% for a 10 V p-p
signal from 20 Hz to 20 kHz. The preamp gain is 100, but can be
modified by varying R5 or R6 (V
OUT
/V
IN
= R5/R6 + 1). A total
input stage emitter current of 4 mA is provided by Q2. The con-
stant current in Q2 is set by using the forward voltage of a GaAsP
LED as a reference. The difference between this voltage and the
V
BE
of a silicon transistor is predictable and constant (to a few
percent) over a wide temperature range. The voltage difference,
approximately 1 V, is dropped across the 250 Ω resistor, which
produces a temperature stabilized emitter current.
SSM2220 Data Sheet
Rev. C | Page 10 of 12
e
n
10µF
+
0.1µF
AD8671
2
3
6
7
4
0.01µF
0.01µF
+15V
–15V
AD8671
3
2
6
7
4
0.01µF
0.01µF
+15V
–15V
1kΩ
3 6
1
2 7
8
SSM2220
3 6
1
2 7
8
SSM2220
+5V
1kΩ
500Ω
ADJUST POT
FOR 2mA
(2V ACROSS
1k RES)
SSM2220
DUT
1 8
3 6
2 7
2mA
5kΩ
1%
5kΩ
1%
10Ω
10kΩ
100Ω
2.2pF
10µF
+
0.1µF
5kΩ
–15V
SPOT NOISE FOR
EACH TRANSISTOR =
e
n
10,000 × 2
03096-019
Figure 19. Voltage Noise Measurement Circuit
NOISE MEASUREMENT
All resistive components and semiconductor junctions contribute
to the system input noise. Resistive components produce Johnson
noise (e
n
2
= 4kTBR, or e
n
= 0.13√R nV/√Hz, where R is in kΩ). At
semiconductor junctions, shot noise is caused by current flowing
through a junction, producing voltage noise in series impedances
such as transistor collector load resistors (I
n
= 0.556√I pA/√Hz,
where I is in μA).
Figure 19 illustrates a technique for measuring the equivalent
input noise voltage of the SSM2220. A stage current of 1 mA is
used to bias each side of the differential pair. The 5 kΩ collector
resistors noise contribution is insignificant compared to the voltage
noise of the SSM2220. Because noise in the signal path is referred
back to the input, this voltage noise is attenuated by the gain of the
circuit. Consequently, the noise contribution of the collector load
resistors is only 0.048 nV/√Hz. This is considerably less than the
typical 0.8 nV/√Hz input noise voltage of the SSM2220 transistor.
The noise contribution of the AD8671 gain stages is also negligible,
due to the gain in the signal path. The op amp stages amplify the
input referred noise of the transistors, increasing the signal strength
to allow the noise spectral density,
( )
input
n
e
× 10,000, to be meas-
ured with a spectrum analyzer. Because equal noise contributions
from each transistor in the SSM2220 are assumed, the output is
divided by √2 to determine the input noise of a single transistor.
Air currents cause small temperature changes that can appear as
low frequency noise. To eliminate this noise source, the measure-
ment circuit must be thermally isolated. Effects of extraneous noise
sources must also be eliminated by totally shielding the circuit.
SSM2220
SSM2220
+V
R
I
OUT
= I
I =
+V – 2V
BE
R
Q4
Q3
Q1 Q2
03096-020
Figure 20. Cascode Current Source
CURRENT SOURCES
A fundamental requirement for accurate current mirrors and active
load stages is matched transistor components. Due to the excellent
V
BE
matching (the voltage difference between one V
BE
and another,
which is required to equalize collector current) and gain matching,
the SSM2220 can be used to implement a variety of standard cur-
rent mirrors that can source current into a load such as an amplifier
stage. The advantages of current loads in amplifiers vs. resistors
are an increase of voltage gain due to higher impedances, larger
signal range, and in many applications, a wider signal bandwidth.
Figure 20 illustrates a cascode current mirror consisting of two
SSM2220 transistor pairs.
The cascode current source has a common base transistor in series
with the output, which causes an increase in output impedance of
the current source because V
CE
stays relatively constant. High fre-
quency characteristics are improved due to a reduction of Miller
capacitance. The small signal output impedance can be determined
Data Sheet SSM2220
Rev. C | Page 11 of 12
by consulting Figure 15. Typical output impedance levels approach
the performance of a perfect current source.
(r
o
)
Q3
=
1
μMho0.1
1
=
Q2 and Q3 are in series and operate at the same current level;
therefore, the total output impedance is as follows:
R
O
= h
FE
× (r
o
)
Q3
(160)(1 MΩ) = 160 MΩ
Current Matching
The objective of current source or mirror design is generation
of currents that either are matched or must maintain a constant
ratio. However, mismatch of base emitter voltages causes output
current errors. Consider the example of Figure 21.
R1
R2
R1 = R2 = R
A CLOSELY MATCHED
TRANSISTOR PAIR
V
B
+
I
C
+
ΔI
C
2
I
C
ΔI
C
2
03096-021
Figure 21. Current Matching Circuit
If the resistors and transistors are equal and the collector
voltages are the same, then the collector currents match precisely.
Investigating the current matching errors resulting from a nonzero
V
OS
, ΔI
C
is defined as the current error between the two transistors.
Figure 22 describes the relationship of current matching errors
vs. offset voltage for a specified average current, I
C
. Note that
because the relative error between the currents is exponentially
proportional to the offset voltage, tight matching is required to
design high accuracy current sources. For example, if the offset
voltage were 5 mV at 100 μA collector current, the current match-
ing error would be 20%. Additionally, temperature effects, such
as offset drift (3 μV/°C per mV of V
OS
), degrade performance if
Q1 and Q2 are not well matched.
1.2
1.0
0.8
0.6
0.4
0.2
0
0.001 10
I
C
= 10µA I
C
= 100µA
I
C
= 1mA
10.10.01
ΔI
C
I
C
%
V
OS
(mV)
SSM2220 V
OS
PERFORMANCE
R = 3kΩ
h
FE
= 200
ΔI = I
C1
– I
C2
I
C
=
I
C1
+ I
C2
2
03096-022
Figure 22. Current Matching Accuracy vs. Offset Voltage

SSM2220PZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Bipolar Transistors - BJT Audio DL Matched PNP
Lifecycle:
New from this manufacturer.
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