2001-2012 Microchip Technology Inc. DS21662F-page 9
TC2014/2015/2185
3.0 PIN DESCRIPTIONS
The descriptions of the pins are described in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Unregulated Supply Input (V
IN
)
Connect the unregulated input supply to the V
IN
pin. If
there is a large distance between the input supply and
the LDO regulator, some input capacitance is neces-
sary for proper operation. A 1 µF capacitor, connected
from V
IN
to ground, is recommended for most
applications.
3.2 Ground Terminal (GND)
Connect the unregulated input supply ground return to
GND. Also connect one side of the 1 µF typical input
decoupling capacitor close to this pin and one side of
the output capacitor C
OUT
to this pin.
3.3 Shutdown Control Input (SHDN)
The regulator is fully enabled when a logic-high is
applied to SHDN
. The regulator enters shutdown when
a logic-low is applied to this input. During shutdown, the
output voltage falls to zero and the supply current is
reduced to 0.5 µA (max).
3.4 Reference Bypass Input (Bypass)
Connecting a low-value ceramic capacitor to Bypass
will further reduce output voltage noise and improve the
Power Supply Ripple Rejection (PSRR) performance
of the LDO. Typical values from 470 pF to 0.01 µF are
suggested. While smaller and larger values can be
used, these affect the speed at which the LDO output
voltage rises when input power is applied. The larger
the bypass capacitor, the slower the output voltage will
rise.
3.5 Regulated Voltage Output (V
OUT
)
Connect the output load to V
OUT
of the LDO. Also con-
nect one side of the LDO output de-coupling capacitor
as close as possible to the V
OUT
pin.
Pin No. Symbol Description
1V
IN
Unregulated supply input
2 GND Ground terminal
3 SHDN
Shutdown control input
4 Bypass Reference bypass input
5V
OUT
Regulated voltage output
