NB4N507A
http://onsemi.com
6
APPLICATIONS INFORMATION
High Frequency Differential PECL Oscillators: The
NB4N507A, along with a low frequency fundamental mode
crystal, can build a high frequency differential PECL output
oscillator. For example, a 10 MHz crystal connected to the
NB4N507A with the 12X output selected (S1 = 0, S0 = 1)
produces a 120 MHz PECL output clock.
Crystal Oscillator Input Interface
The NB4N507A features an integrated crystal oscillator
to minimize system implementation costs. The oscillator
circuit is a parallel resonant circuit and thus, for optimum
performance, a parallel resonant crystal should be used.
As the oscillator is somewhat sensitive to loading on its
inputs, the user is advised to mount the crystal as close to the
NB4N507A as possible to avoid any board level parasitics.
Surface mount crystals are recommended, but not required.
Figure 7. Crystal Input Interface
C1
33 pF
X1
18 pF
C2
27 pF
Parallel Crystal
X
1
/CLK
X
2
High Frequency VCXO: The bandwidth of the PLL is
guaranteed to be greater than 10 kHz. This means that the
PLL will track any modulation on the input with a frequency
of less than 10 kHz. By using this property, a low frequency
VCXO can be built. The output can then be multiplied by the
NB4N507A, thereby producing a high frequency VCXO.
High Frequency TCXO: Extending the previous
application, an inexpensive, low frequency TCXO can be
built and the output frequency can be multiplied using the
NB4N507A. Since the output of the chip is phase-locked to
the input, the NB4N507A has no temperature dependence,
and the temperature coefficient of the combined system is
the same as that of the low frequency TCXO.
Decoupling and External Components
The NB4N507A requires a 0.01 mF decoupling capacitor
to be connected between V
DD
and GND on pins 2 and 5. It
must be connected close to the NB4N507A. Other V
DD
and
GND connections should be connected to those pins, or to the
V
DD
and GND planes on the board. Another four resistors are
needed for the PECL outputs as shown in Figure 4. Suggested
values of these resistors are shown, but they can be varied to
change the differential pair output swing, and the DC level.
ORDERING INFORMATION
Device Package Shipping
†
NB4N507AD SOIC-16 48 Units / Rail
NB4N507ADG SOIC-16
(Pb-Free)
48 Units / Rail
NB4N507ADR2 SOIC-16 2500 / Tape & Reel
NB4N507ADR2G SOIC-16
(Pb-Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D - ECL Clock Distribution Techniques
AN1406/D - Designing with PECL (ECL at +5.0 V)
AN1503/D -
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D - Metastability and the ECLinPS Family
AN1568/D - Interfacing Between LVDS and ECL
AN1672/D - The ECL Translator Guide
AND8090/D AC Characteristics of ECL Devices-
