Document Number: 002-08308 Rev. *C Page 13 of 24
CY88152A
10.2 AC Characteristics
(Ta = 40°C to + 85°C, VDD = 3.3 V ± 0.3 V, VSS = 0.0 V)
Parameter Symbol Pin Conditions
Value
Unit
Min Typ Max
Oscillation frequency fx XIN,
XOUT
Fundamental oscillation 16.6 40 MHz
3rd over tone 40
48
Input frequency fin XIN CY88152A-100 16.6 134 MHz
CY88152A-101/111 16.6 67
CY88152A-112 40
134
Output frequency fOUT CKOUT CY88152A-100 16.6 134 MHz
CY88152A-101/111 16.6 67
CY88152A-112 40
134
Output slew rate SR CKOUT 0.4 V to 2.4 V
Load capacitance 15 pF
0.4 4.0 V/ns
Output clock duty cycle t
DCC CKOUT 1.5 V 40 60 %
Modulation frequency
(Number of input clocks
per modulation)
fMOD
(nMOD)
CKOUT CY88152A-100
FREQ[1 : 0] = (00)
fin/2640
(2640)
fin/2280
(2280)
fin/1920
(1920)
kHz
(clks)
CY88152A-100
FREQ[1 : 0]
= (01)
fin/4400
(4400)
fin/3800
(3800)
fin/3200
(3200)
CY88152A-100
FREQ[1 : 0]
= (10)
fin/5280
(5280)
fin/4560
(4560)
fin/3840
(3840)
CY88152A-100
FREQ[1 : 0]
= (11)
fin/8800
(8800)
fin/7600
(7600)
fin/6400
(6400)
CY88152A-101/111
FREQ
= 0
fin/2640
(2640)
fin/2280
(2280)
fin/1920
(1920)
CY88152A-101/111
FREQ
= 1
fin/4400
(4400)
fin/3800
(3800)
fin/3200
(3200)
CY88152A-112
FREQ
= 0
fin/5280
(5280)
fin/4560
(4560)
fin/3840
(3840)
CY88152A-112
FREQ
= 1
fin/8800
(8800)
fin/7600
(7600)
fin/6400
(6400)
Lock-Up time tLK CKOUT 16.6 MHz to 80 MHz 25ms
80 MHz to 134 MHz
38
Cycle-cycle jitter tJC CKOUT No load capacitance,
Ta
= + 25 °C,
V
DD = 3.3 V
−−100 ps-rms
Document Number: 002-08308 Rev. *C Page 14 of 24
CY88152A
<Definition of modulation frequency and number of input clocks per modulation>
CY88152A contains the modulation period to realize the efficient EMI reduction.
The modulation period fMOD depends on the input frequency and changes between fMOD (Min) and fMOD (Max) .
Furthermore, the average value of fMOD equals the typical value of the electrical characteristics.
t
f
MOD
(Min) f
MOD
(Max)
t
Document Number: 002-08308 Rev. *C Page 15 of 24
CY88152A
11. Output Clock Duty Cycle (tDCC = tb/ta)
12. Input Frequency (fin = 1/tin)
13. Output Slew Rate (SR)
14. Cycle-cycle Jitter (tJC = | tn tn + 1 |)
CKOUT
1.5 V
ta
tb
0.8 VDD
tin
XIN
2.4 V
0.4 V
t
f
t
r
CKOUT
Note: SR = (2.40.4) /tr, SR = (2.40.4) /tf
tn+1tn
CKOUT
Note: Cycle-cycle jitter is defined the difference between a certain cycle and immediately after
(or, immediately before) .

MB88152APNF-G-111-JNERE1

Mfr. #:
Manufacturer:
Cypress / Spansion
Description:
Clock Generators & Support Products Spread Spectrum Clock Generator
Lifecycle:
New from this manufacturer.
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