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74HCT4053D-Q100,11

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P31
74HC_HCT4053_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 22 November 2012 18 of 30
NXP Semiconductors
74HC4053-Q100; 74HCT4053-Q100
Triple 2-channel analog multiplexer/demultiplexer
[1] t
pd
is the same as t
PHL
and t
PLH
.
[2] t
on
is the same as t
PZH and
t
PZL
.
[3] t
off
is the same as t
PHZ
and t
PLZ
.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
= C
PD
V
CC
2
f
i
N + {(C
L
+C
sw
) V
CC
2
f
o
} where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
N = number of inputs switching;
{(C
L
+C
sw
) V
CC
2
f
o
} = sum of outputs;
C
L
= output load capacitance in pF;
C
sw
= switch capacitance in pF;
V
CC
= supply voltage in V.
T
amb
= 40 C to +125 C
t
pd
propagation delay V
is
to V
os
; R
L
= ; see Figure 13
[1]
V
CC
= 4.5 V; V
EE
=0 V --18ns
V
CC
= 4.5 V; V
EE
= 4.5 V - - 12 ns
t
on
turn-on time E to V
os
; R
L
=1 k; see Figure 14
[2]
V
CC
= 4.5 V; V
EE
=0 V --72ns
V
CC
= 4.5 V; V
EE
= 4.5 V - - 51 ns
Sn to V
os
; R
L
=1 k; see Figure 14
[2]
V
CC
= 4.5 V; V
EE
=0 V --72ns
V
CC
= 4.5 V; V
EE
= 4.5 V - - 51 ns
t
off
turn-off time E to V
os
; R
L
=1 k; see Figure 14
[3]
V
CC
= 4.5 V; V
EE
=0 V --66ns
V
CC
= 4.5 V; V
EE
= 4.5 V - - 47 ns
Sn to V
os
; R
L
=1 k; see Figure 14
[3]
V
CC
= 4.5 V; V
EE
=0 V --66ns
V
CC
= 4.5 V; V
EE
= 4.5 V - - 47 ns
Table 10. Dynamic characteristics for 74HCT4053-Q100 …continued
GND = 0 V; t
r
=t
f
=6ns; C
L
= 50 pF; for test circuit see Figure 15.
V
is
is the input voltage at a nYn or nZ terminal, whichever is assigned as an input.
V
os
is the output voltage at a nYn or nZ terminal, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
Fig 13. Input (V
is
) to output (V
os
) propagation delays
001aad555
t
PLH
t
PHL
50 %
50 %
V
is
input
V
os
output
74HC_HCT4053_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 22 November 2012 19 of 30
NXP Semiconductors
74HC4053-Q100; 74HCT4053-Q100
Triple 2-channel analog multiplexer/demultiplexer
For 74HC4053-Q100: V
M
=0.5 V
CC
.
For 74HCT4053-Q100: V
M
=1.3V.
Fig 14. Turn-on and turn-off times
001aad556
t
PLZ
t
PHZ
switch OFF
switch ON
switch ON
V
os
output
V
os
output
E, Sn inputs
V
M
V
I
0 V
90 %
10 %
t
PZL
t
PZH
50 %
50 %
Definitions for test circuit; see Table 11:
R
T
= termination resistance should be equal to the output impedance Z
o
of the pulse generator.
C
L
= load capacitance including jig and probe capacitance.
R
L
= load resistance.
S1 = Test selection switch.
Fig 15. Test circuit for measuring switching times
V
M
V
M
t
W
t
W
10 %
90 %
0 V
V
I
V
I
negative
pulse
positive
pulse
0 V
V
M
V
M
90 %
10 %
t
f
t
r
t
r
t
f
001aae382
V
CC
V
CC
open
GND
V
EE
V
I
V
os
DUT
C
L
R
T
R
L
S1
PULSE
GENERATOR
V
is
74HC_HCT4053_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 2 — 22 November 2012 20 of 30
NXP Semiconductors
74HC4053-Q100; 74HCT4053-Q100
Triple 2-channel analog multiplexer/demultiplexer
[1] t
r
= t
f
= 6 ns; when measuring f
max
, there is no constraint to t
r
and t
f
with 50 % duty factor.
[2] V
I
values:
a) For 74HC4053-Q100: V
I
= V
CC
b) For 74HCT4053-Q100: V
I
= 3 V
11.1 Additional dynamic characteristics
[1] Adjust input voltage V
is
to 0 dBm level (0 dBm = 1 mW into 600 ).
[2] Adjust input voltage V
is
to 0 dBm level at V
os
for 1 MHz (0 dBm = 1 mW into 50 ).
Table 11. Test data
Test Input Load S1 position
V
I
V
is
t
r
, t
f
C
L
R
L
at f
max
other
[1]
t
PHL
, t
PLH
[2]
pulse < 2 ns 6 ns 50 pF 1 k open
t
PZH
, t
PHZ
[2]
V
CC
< 2 ns 6 ns 50 pF 1 k V
EE
t
PZL
, t
PLZ
[2]
V
EE
< 2 ns 6 ns 50 pF 1 k V
CC
Table 12. Additional dynamic characteristics
Recommended conditions and typical values; GND = 0 V; T
amb
=25
C; C
L
=50pF.
V
is
is the input voltage at pins nYn or nZ, whichever is assigned as an input.
V
os
is the output voltage at pins nYn or nZ, whichever is assigned as an output.
Symbol Parameter Conditions Min Typ Max Unit
d
sin
sine-wave distortion f
i
= 1 kHz; R
L
=10k; see Figure 16
V
is
= 4.0 V (p-p); V
CC
= 2.25 V; V
EE
= 2.25 V - 0.04 - %
V
is
= 8.0 V (p-p); V
CC
= 4.5 V; V
EE
= 4.5 V - 0.02 - %
f
i
=10kHz; R
L
=10k; see Figure 16
V
is
= 4.0 V (p-p); V
CC
= 2.25 V; V
EE
= 2.25 V - 0.12 - %
V
is
= 8.0 V (p-p); V
CC
= 4.5 V; V
EE
= 4.5 V - 0.06 - %
iso
isolation (OFF-state) R
L
= 600 ; f
i
= 1 MHz; see Figure 17
V
CC
= 2.25 V; V
EE
= 2.25 V
[1]
- 50 - dB
V
CC
= 4.5 V; V
EE
= 4.5 V
[1]
- 50 - dB
Xtalk crosstalk between two switches/multiplexers;
R
L
= 600 ; f
i
= 1 MHz; see Figure 18
V
CC
= 2.25 V; V
EE
= 2.25 V
[1]
- 60 - dB
V
CC
= 4.5 V; V
EE
= 4.5 V
[1]
- 60 - dB
V
ct
crosstalk voltage peak-to-peak value between control and any
switch. R
L
=600; f
i
= 1 MHz; E or Sn square
wave between V
CC
and GND; t
r
=t
f
=6ns;
see Figure 19
V
CC
= 4.5 V; V
EE
=0 V - 110 - mV
V
CC
= 4.5 V; V
EE
= 4.5 V - 220 - mV
f
(3dB)
3 dB frequency response R
L
=50; see Figure 20
V
CC
= 2.25 V; V
EE
= 2.25 V
[2]
-160- MHz
V
CC
= 4.5 V; V
EE
= 4.5 V
[2]
-170- MHz
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74HCT4053D-Q100,11

Mfr. #:
Buy 74HCT4053D-Q100,11
Manufacturer:
Nexperia
Description:
Multiplexer Switch ICs 74HCT4053D-Q100/SO16/REEL 13
Lifecycle:
New from this manufacturer.
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