PI74SSTV16857AE

4
PS8460H 11/10/08
PI74SSTV16857
14-Bit Registered Buffer
sretemaraPsnoitidnoCtseTV
CC
.niM.pyT
)1(
.xaMstinU
V
KI
I
I
81=mA V3.22.1
V
V
O
H
I
OH
=– μ001A V7.2-V3.2V
DD
–V2.0
I
OH
61=mA V3.259.1
V
O
L
I
OL
= μ001A V7.2-V3.22.0
I
OH
61=mA V3.253.0
I
I
,stupnIllAV
I
V=
DD
DNGroV7.25
Aμ
I
DD
)citatS(ybdnatSDNG=TESER
I
O
=0 V7.2
01
citatSgnitarepO
V
I
V=
HI
)CA(roV
I
,)CA(
V=TESER
DD
65Am
I
DDD
cimanyD
kcolC-gnitarepO
ylno
V=TESER
DD
V
I
V=
HI)CA(
Vro
)CA(LI
,
gnihctiwsKCdnaKC
elcycytud%05
25
/Aμ
kcolc
zHM
cimanyD
rep-gnitarepO
tupniatadhcae
V=TESER
DD
V
I
V=
HI)CA(
Vro
)CA(LI
,
gnihctiwsKCdnaKC
atadenO.elcycytud%05
kcolcflahtagnihctiwstupni
elcycytud%05,ycneuqerf
9
/Aμ
kcolc
zHM
ataD
r
HO
hgiHtuptuOI
HO
Am02=V7.2-V3.27 02
mhor
LO
woLtuptuOI
LO
Am02=V7.2-V3.27 02
r
O
()
r
HO-
r
LO
I
O
T,Am02=
A
C°52=
V5.2
6
C
I
stupniataDV
I
V=
FER
Vm053±0.25.3
Fp
KCdnaKCV
RCI
V,V52.1=
)PP(I
Vm063=V5.20.25.3
Notes:
4. Typical values are at V
DD
= Nominal V
DD
, T
A
= +25°C.
DC Electrical Characteristics
(Over the Operating Range, T
A
= 0°C to +70°C, V
DD
= 2.5V ±200mV, V
DDQ
= 2.5V ±200mV)
Δ
08-0291
PI74SSTV16857
14-Bit Registered Buffer
5
PS8460H 11/10/08
VDD 2= . V5V2.0±
tinU
.niM.xaM
kcolcfycneuqerFkcolC 002zHM
t
W
noitaruDesluP5.2
sn
t
tca
emitevitcastupnilaitnereffiD
)5(
22
t
tcani
emitevitcanistupnilaitnereffidetarwelstuptuO
)6(
22
t
US
etarwelstsaf,emitputeS
)9,7(
KC,KCerofebataD
57.0
etarwelswols,emitputeS
)9,8(
9.0
t
h
etarwelstsaf,emitdloH
)9,7(
KC,KCerofebataD
57.0
etarwelswols,emitdloH
)9,8(
9.0
retemaraP
morF
)tupnI(
oT
)tuptuO(
V
DD
V2.0±V5.2=
stinU
.niM.pyT.xaM
f
xam
002zHM
t
dp
KLC,KLCQ1.18.2
sn
t
lhp
TESERQ 0.5
Timing Requirements (over recommended operating free-air temperature range, unless otherwise noted)
Switching characteristics (over recommended operating free-air temperature range, unless otherwise noted.)
(See test circuits and switching waveforms).
Notes:
5. Data inputs must be held low for a minimum time of t
act
min , after RESET is taken high
6. Data and clock inputs must be held at valid levels (not floating) for a minimum time of t
inact
min, after RESET is taken low.
7. Data signal input slew rate 1 V/ns
8. Data signal input slew rate 0.5V/ns and <1V/ns
9. CLK, CLK input slew rates are 1 V/ns.
08-0291
6
PS8460H 11/10/08
PI74SSTV16857
14-Bit Registered Buffer
Voltage and Current Waveforms
Input Active and Inactive Times
Voltage Waveforms - Pulse Duration
Voltage Waveforms - Setup and Hold Times
Test Circuit and Switching Waveforms
Notes:
8. C
L
includes probe and jig capacitance.
9. I
DD
tested with clock and data inputs held at V
DD
or GND, and I
O
= 0mA.
10. All input pulses are supplied by generators having the following characteristics:
PRR ≤10 MHz, Z
O
= 50Ω. Input slew rate = 1V/ns ±20% (unless otherwise specified).
11. The outputs are measured one at a time with one transition per measurement.
12. V
TT
= V
REF
= V
DDQ
/2
13. V
IH
= V
REF
+ 350mV (ac voltage levels) for SSTL inputs. V
IH
= V
DD
for LVCMOS input.
14. V
IL
= V
REF
+ 350mV (ac voltage levels) for SSTL inputs. V
IL
= GND for LVCMOS input.
15. t
PLH
and t
PHL
are the same as t
pd
.
Parameter Measurement Information (V
DD
= 2.5V ±0.2V)
Load Circuit
Input
V
IL
V
REF
V
REF
t
w
V
IH
Input
Timing
Input
t
h
t
su
V
IL
V
ICR
V
REF
V
REF
V
I(PP)
V
IH
Voltage Waveforms - Propagation Delay Times
Timing
Input
Output
V
ICR
t
PLH
t
PHL
V
ICR
V
I(PP)
V
OH
V
TT
V
TT
V
OL
LVCMOS
RESET
Input
Output
t
PHL
V
DD
/2
V
OH
V
IH
V
IL
V
TT
V
OL
Voltage Waveforms - Propagation Delay Times
V
TT
R
L
= 50Ω
From Output
Under Test
CL = 30pF
(8)
Test Point
LVCMOS
RESET
Input
I
DD
(9)
V
DD
V
DD
/2
t
inact
0V
I
DDH
10%
90%
I
DDL
t
act
08-0291

PI74SSTV16857AE

Mfr. #:
Manufacturer:
Diodes Incorporated
Description:
Registers 14Bit Lead Free Register Buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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