PI74SSTV16857
14-Bit Registered Buffer
5
PS8460H 11/10/08
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TESERQ 0.5
Timing Requirements (over recommended operating free-air temperature range, unless otherwise noted)
Switching characteristics (over recommended operating free-air temperature range, unless otherwise noted.)
(See test circuits and switching waveforms).
Notes:
5. Data inputs must be held low for a minimum time of t
act
min , after RESET is taken high
6. Data and clock inputs must be held at valid levels (not floating) for a minimum time of t
inact
min, after RESET is taken low.
7. Data signal input slew rate ≥ 1 V/ns
8. Data signal input slew rate ≥ 0.5V/ns and <1V/ns
9. CLK, CLK input slew rates are ≥ 1 V/ns.
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