IRFR010, SiHFR010
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Vishay Siliconix
S13-0167-Rev. B, 04-Feb-13
7
Document Number: 91420
For technical questions, contact: hvm@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Fig. 14 - For N-Channel
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Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91420
.
P.W.
Period
dI/dt
Diode recovery
dV/dt
Ripple ≤ 5 %
Body diode forward drop
Re-applied
voltage
Reverse
recovery
current
Body diode forward
current
V
GS
= 10 V
a
I
SD
Driver gate drive
D.U.T. l
SD
waveform
D.U.T. V
DS
waveform
Inductor current
D =
P.W.
Period
+
-
+
+
+
-
-
-
Peak Diode Recovery dV/dt Test Circuit
V
DD
• dV/dt controlled by R
g
• Driver same type as D.U.T.
•
I
SD
controlled by duty factor “D”
• D.U.T. - device under test
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
R
g
Note
a. V
GS
= 5 V for logic level devices
V
DD
