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MP5002DQ-LF-P

P1-P3P4-P6P7-P9P10-P12
MP5002
3.3V, 1A-3A Programmable Current
Limit Switch
MP5002 Rev. 0.93 www.MonolithicPower.com 1
10/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
The Future of Analog IC Technology
DESCRIPTION
The MP5002 is a protection device designed to
protect circuitry on the output (V
OUT
) from
transients on the input (V
IN
). It also protects V
IN
from undesired shorts and transients coming
from the load.
At start up, inrush current is limited by limiting the
slew rate at V
OUT
. The slew rate is controlled by a
small capacitor at the dv/dt pin. The dv/dt pin has
an internal circuit that allows the customer to float
this pin (no connect) and still receive a 1.1ms
ramp time at V
OUT
.
The max load at the output (V
OUT
) is current
limited. This is accomplished by utilizing a sense
FET topology. The magnitude of the current limit
is controlled by an external resistor connected
between the I
LIMIT
pins.
An internal charge pump drives the gate of the
power device, allowing a very low on-resistance
DMOS power FET of just 44m.
V
OUT
is protected from V
IN
being too low or too
high. Under Voltage Lockout (UVLO) assures
that the input is above the minimum operating
threshold, before the power device is turned on.
If V
IN
goes above the high output threshold, the
output voltage will be limited.
FEATURES
• Integrated 44m Power FET
• Enable/Fault Pin
• Adjustable Slew Rate for Output Voltage
• Adjustable Current Limit: 1A-3A
• Thermal Protection
• Over Voltage Limit
APPLICATIONS
• Hot Swap
• PC Cards
• Cell Phones
• Laptops
TYPICAL APPLICATION
MP5002
+ILIMIT
-ILIMIT
Enable/Fault
VOUT
VOUT
VOUT
VOUT
VOUT
VIN
dv/dt
GND
5
11
6
7
8
9
10
4
3
2
1
VIN
VOUT
C
dv/dt
(Optional)
R
LIMIT
EN
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks
of Monolithic Power Systems, Inc.
MP5002 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH
MP5002 Rev. 0.93 www.MonolithicPower.com 2
10/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
ORDERING INFORMATION
Part Number* Package Top Marking Free Air Temperature (T
A
)
MP5002DQ QFN10 (3x3) 3H
–40°C to +85°C
* For Tape & Reel, add suffix –Z (e.g. MP5002DQ–Z);
For RoHS compliant packaging, add suffix –LF; (eg. 5002DQ–LF–Z)
PACKAGE REFERENCE
TOP VIEW
GND
dv/dt
ENABLE/FAULT
-ILIMIT
+ILIMIT
1
2
3
4
5
VOUT
VOUT
VOUT
VOUT
VOUT
10
9
8
7
6
EXPOSED
VIN
PAD
ABSOLUTE MAXIMUM RATINGS
(1)
V
IN
, V
OUT
, I
LIMIT
.............................................. 22V
dv/dt, ENABLE/FAULT .................................. 6V
Continuous Power Dissipation (T
A
= +25°C)
(2)
............................................................. 2.5W
Storage Temperature............... -65°C to +155°C
Junction Temp…………………..-40°C to +150°C
Recommended Operating Conditions
Input Voltage Operating Range……….2.5V to 4V
Operating Junct. Temp (T
J
)…….-40°C to +125°C
Thermal Resistance
(3)
θ
JA
θ
JC
QFN10 ....................................50 ...... 12 ... °C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T
J
(MAX), the junction-to-
ambient thermal resistance
JA
, and the ambient temperature
T
A
. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by P
D
(MAX)=(T
J
(MAX)-
T
A
)/
JA
. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) Measured on JESD51-7 4-layer board.
MP5002 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH
MP5002 Rev. 0.93 www.MonolithicPower.com 3
10/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
V
IN
= 3.3V, R
LIMIT
=24Ω, C
OUT
= 10µF, T
J
=25°C, unless otherwise noted.
Parameters Symbol Condition Min Typ Max Units
Power FET
Delay Time t
DLY
Enabling of chip to
I
D
=100mA with a 12
resistive load
0.2 ms
44 82
ON Resistance
(4)
R
DSon
T
J
=+80°C 95
m
Off State Output Voltage V
OFF
Enable=0V, R
L
=500 120 mV
Thermal Latch
Shutdown Temperature T
SD
175
°C
Under/Over Voltage Protection
Output Clamping Voltage V
CLAMP
Overvoltage Protection
V
IN
= 6V
4 4.5 5.0 V
Under Voltage Lockout V
UVLO
Turn on,
Voltage going high
2.15 2.35 2.5 V
Under Voltage Lockout (UVLO)
Hysteresis
V
HYST
100 mV
Current Limit
Short Circuit Current Limit
(4)
(Hold Current)
I
LIM
R
LIMIT
=24 1.2 1.55 1.9 A
Trip Current I
LIM-OL
R
LIMIT
=24 2.5 A
dv/dt Circuit
Rise Time T
r
Float dv/dt pin, Note 5 0.64 1.1 2.0 ms
Enable/Fault
Low Level Input Voltage V
IL
Output Disabled 0.5 V
Intermediate Level Input Voltage V
I (INT)
Thermal Fault, Output
Disabled
0.8 1.4 2.0 V
High Level Input Voltage V
IH
Output Enabled 2.5 V
High State Maximum Voltage V
I (MAX)
3.25 V
Low Level Input Current (Sink) I
IL
V
ENABLE
=0V -28 -50
µA
Maximum Fanout for Fault Signal
Total number of chips that
can be connected for
simultaneous shutdown
3 Units
Maximum Voltage on Enable Pin V
MAX
Note 6 V
IN
V
Total Device
Device Operational 1.5 2.0
Bias Current I
BIAS
Thermal Shutdown 0.9
mA
Minimum Operating Voltage for
UVLO
V
MIN
Enable<0.5V 2.0 V
Notes:
4) Guaranteed by design.
5) Measured from 10% to 90%.
6) Maximum Input Voltage to be6.0V if V
IN
6.0V. Maximum Input Voltage to be V
IN
if V
IN
6.0V.
P1-P3P4-P6P7-P9P10-P12

MP5002DQ-LF-P

Mfr. #:
Buy MP5002DQ-LF-P
Manufacturer:
Monolithic Power Systems (MPS)
Description:
Power Switch ICs - Power Distribution 3.3V 1-3A Prog Current Limit Switch
Lifecycle:
New from this manufacturer.
Delivery:
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