REVISION J 05/25/16 13 12-OUTPUT DB1200ZL
9ZXL1231 DATASHEET
SMBusTable: PLL Mode, and Frequency Select Register
Pin # Name Control Function T
e 0 1 Default
Bit 7
PLL Mode 1 PLL Operating Mode Rd back 1
R
Bit 6
PLL Mode 0 PLL Operating Mode Rd back 0
R
Latch
Bit 5
0
Bit 4
0
Bit 3
PLL_SW_EN Enable S/W control of PLL BW RW HW Latch SMBus Control 0
Bit 2
PLL Mode 1 PLL O
eratin
Mode 1 RW 1
Bit 1
PLL Mode 0 PLL O
eratin
Mode 1 RW 1
Bit 0
100M_133M# Frequency Select Readback
R
133MHz 100MHz
Latch
SMBusTable: Output Control R egister
Pin # Name Control Function T
e 0 1 Default
Bit 7
DIF_7_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 6
DIF_6_En Output Control - '0' overrides OE# pin RW 1
Bit 5
DIF_5_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 4
DIF_4_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 3
DIF_3_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 2
DIF_2_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 1
DIF_1_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 0
DIF_0_En Output Control - '0' overrides OE# pin RW 1
SMBusTable: Output Control R egister
Pin # Name Control Function Type 0 1 Default
Bit 7
0
Bit 6
0
Bit 5
Bit 4
Bit 3
DIF_11_En Ou tput Control - '0' overrides OE# pin RW 1
Bit 2
DIF_10_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 1
DIF_9_En Out
ut Control - '0' overrides OE#
in RW 1
Bit 0
DIF_8_En Out
ut Control - '0' overrides OE#
in RW 1
SMBusTable: Reserved Re
ister
Pin # Name Control Function Type 0 1 Default
Bit 7
0
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
0
Bit 0
0
SMBusTable: Reserved Register
Pin # Name Control Function T
e 0 1 Default
Bit 6
0
Bit 5
0
Bit 4
0
Bit 3
0
Bit 2
0
Bit 1
Bit 0
0
SMBusTable: Vendor & Revision ID R egister
Pin # Name Control Function Type 0 1 Default
Bit 7
RID3 R
Bit 6
RID2 R
Bit 5
RID1 R
Bit 4
RID0 R
Bit 3
VID 3 R - - 0
Bit 2
VID 2 R - - 0
Bit 1
VID 1 R - - 0
Bit 0
VID 0 R - - 1
Low/Low Enable
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
-
Reserved
Byte 2
Byte 3
50/51
Byte 1
26/27
Byte 0
5
5
43/42
39/38
47/46
-
64/63
-
Byte 5
Byte 4
See PLL Operating Mode
Readback Table
REVISION ID A rev = 0000
Low/Low Enable
VEN DOR ID
Reserved
Reserved
See PLL Operating Mode
Readback Table
Note:
Setting bit 3 to ' 1' allo ws the user to overide the Latch value from pin 5 via use of bits 2 and 1. Use the values from the PLL Operating Mode
Readback Table. Note that Bits 7 and 6 will keep the value originally latched on pin 5. A warm reset of the system will have to accomplished if the
user changes these bits.
-
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
