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Implementation in the application TSH120
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3 Implementation in the application
This section explains how the TSH120 video buffer operates in a typical application.
On the input, a DC level shifter optimizes the position of the video signal with no clamping
on the output rails. The filter is a reconstruction filter. It is used to attenuate the DAC’s
sampling frequency which causes a parasitic signal in the video spectrum (typically at
27MHz in the case of standard video). This function must be achieved while keeping a low
group delay.
On the output, the SAG correction decreases C
out
while keeping a very low frequency pole
(see Figure 18). Nevertheless, the output can be directly connected to the line without any
capacitor. In this case, both OUT and SAG pins are connected together and the equivalent
gain of the buffer remains 6dB (see Figure 19).
Figure 18. Schematic diagram with output capacitor
Figure 19. Schematic diagram without output capacitor
75
75 cable
75
+
-
+2.2V to +5.5V
C
out
33µF
Rail-to-rail
DC shifter
LPF
3
rd
order
1
TV
Video
DAC
1V
pp
2V
pp
1V
pp
SAG
6
2
4
3
5
Shutdown
22µF
75
75 cable
75
+
-
+2.2V to +5.5V
C
out
33µF
Rail-to-rail
DC shifter
LPF
3
rd
order
1
TV
Video
DAC
1V
pp
2V
pp
1V
pp
SAG
6
2
4
3
5
Shutdown
22µF
75
75 cable
75
+
-
Rail-to-rail
DC shifter
LPF
3
rd
order
1
TV
Video
DAC
1V
pp
2V
pp
1V
pp
SAG
6
2
4
3
5
Shutdown
+2.2V to +5.5V
75
75 cable
75
+
-
Rail-to-rail
DC shifter
LPF
3
rd
order
1
TV
Video
DAC
1V
pp
2V
pp
1V
pp
SAG
6
2
4
3
5
Shutdown
+2.2V to +5.5V
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