OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

EL7562CUZ-T13

P1-P3P4-P6P7-P9
1
®
FN7295.1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2006. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
EL7562
Monolithic 2Amp DC-DC Step-Down
Regulator
The EL7562 is an integrated, synchronous step-down
regulator with output voltage adjustable from 1.0V to 3.8V. It
is capable of delivering 2A continuous current at up to 95%
efficiency. The EL7562 operates at a constant frequency
pulse width modulation (PWM) mode, making external
synchronization possible. Patented on-chip resistorless
current sensing enables current mode control, which
provides cycle-by-cycle current limiting, over-current
protection, and excellent step load response. The EL7562 is
available in a fused-lead 16 Ld QSOP package. With proper
external components, the whole converter fits into a less
than 0.5 in
2
area. The minimal external components and
small size make this EL7562 ideal for desktop and portable
applications.
The EL7562 is specified for operation over the 0°C to +70°C
temperature range.
Pinout
EL7562
(16 LD QSOP)
TOP VIEW
Features
• Integrated synchronous MOSFETs and current mode
controller
• 2A continuous output current
• Up to 95% efficiency
• 3.3V or 5V nominal input voltage
• Adjustable output from 1V to 3.8V
• Cycle-by-cycle current limit
• Precision reference
• ±0.5% load and line regulation
• Adjustable switching frequency to 1MHz
• Oscillator synchronization possible
• Internal soft-start
• Over-temperature protection
• Under-voltage lockout
• 16 Ld QSOP package
• Pb-free plus anneal available (RoHS compliant)
Applications
• DSP, CPU core and IO supplies
• Logic/Bus supplies
• Portable equipment
• DC-DC converter modules
• GTL + Bus power supply
Please refer to page 4 for 3.3V input Application Diagram
Manufactured under U.S. Patent No. 57,323,974
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8 9
SGND
COSC
VDD
PGND
PGND
VIN
VIN
EN
PGND
VREF
FB
VDRV
LX
LX
VHI
PGND
C
4
270pF
C
3
0.1µF
C
2
0.1µF
C
1
100µF
R
3
39Ω
V
IN
(4.5V- 5.5V)
C
6
0.1µF
C
7
100µF
R
2
2.37kΩR
1
1kΩ
C
5
0.1µF
V
O
(3.3V,
2A)
Ordering Information
PART NUMBER
PART
MARKING
TAPE &
REEL PACKAGE
PKG.
DWG. #
EL7562CU 7562CU - 16 Ld QSOP MDP0040
EL7562CU-T7 7562CU 7” 16 Ld QSOP MDP0040
EL7562CU-T13 7562CU 13” 16 Ld QSOP MDP0040
EL7562CUZ
(Note)
7562CUZ - 16 Ld QSOP
(Pb-free)
MDP0040
EL7562CUZ-T7
(Note)
7562CUZ 7” 16 Ld QSOP
(Pb-free)
MDP0040
EL7562CUZ-T13
(Note)
7562CUZ 13” 16 Ld QSOP
(Pb-free)
MDP0040
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Data Sheet May 1, 2006
N
O
T
R
E
C
O
M
M
E
N
D
E
D
F
O
R
N
E
W
D
E
S
I
G
N
S
S
E
E
E
L
7
5
3
2
2
Absolute Maximum Ratings (T
A
= 25°C)
Supply Voltage between V
IN
or V
DD
and GND . . . . . . . . . . . . +6.5V
V
LX
Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
IN
+0.3V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V, V
DD
+0.3V
V
HI
Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V, V
LX
+6V
Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Ambient Temperature . . . . . . . . . . . . . . . . . 0°C to +70°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +135°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications V
DD
= V
IN
= 5V, T
A
= T
J
= 25°C, C
OSC
= 270pF, unless otherwise specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
V
REF
Reference Accuracy 1.24 1.26 1.28 V
V
REFTC
Reference Temperature Coefficient 50 ppm/°C
V
REFLOAD
Reference Load Regulation 0 < I
REF
< 50µA -1 %
V
RAMP
Oscillator Ramp Amplitude 1.15 V
I
OSC_CHG
Oscillator Charge Current 0.1V < V
OSC
< 1.25V 200 µA
I
OSC_DIS
Oscillator Discharge Current 0.1V < V
OSC
< 1.25V 8 mA
I
VDD
+V
DRV
V
DD
+V
DRV
Supply Current V
EN
= 4V, F
OSC
= 120kHz 2 6.5 mA
I
VDD_OFF
V
DD
Standby Current EN = 0 1 1.5 mA
V
DD_OFF
V
DD
for Shutdown 2.5 2.7 V
V
DD_ON
V
DD
for Startup 2.6 3 V
T
OT
Over-temperature Threshold 135 °C
T
HYS
Over-temperature Hysteresis 20 °C
I
LEAK
Internal FET Leakage Current EN = 0, L
X
= 5V (low FET), L
X
= 0V (high
FET)
20 µA
I
LMAX
Peak Current Limit 3A
R
DSON
FET On Resistance Wafer level test only 60 120 mΩ
R
DSONTC
R
DSON
Tempco 0.2 mΩ/°C
V
FB
Output Initial Accuracy I
LOAD
= 0A 0.970 0.985 1.000 V
V
FB_LINE
Output Line Regulation V
IN
= 5V, ΔV
IN
= 10%, I
LOAD
= 0A 0.5 %
V
FB_LOAD
Output Load Regulation 0.1A < I
LOAD
< 1A 0.5 %
V
FB_TC
Output Temperature Stability -40°C < T
A
< 85°C, I
LOAD
= 0.5A ±1 %
I
FB
Feedback Input Pull Up Current V
FB
= 0V 100 200 nA
V
EN_HI
EN Input High Level (Note) 4 V
V
EN_LO
EN Input Low Level 1V
I
EN
Enable Pull Up Current V
EN
= 0 -4 -2.5 µA
NOTE: V
EN_HI
is typically 2/3 of V
DD
. For V
DD
= 3.3V, V
EN_HI
is 2.2V typical.
3
Closed-Loop AC Electrical Specifications V
S
= V
IN
= 5V, T
A
= T
J
= 25°C, C
OSC
= 270pF, unless otherwise specified.
PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNIT
F
OSC
Oscillator Initial Accuracy 493 580 667 kHz
t
SYNC
Minimum Oscillator Sync Width 25 ns
M
SS
Soft-start Slope 0.5 V/ms
t
BRM
FET Break Before Make Delay 15 ns
t
LEB
High Side FET Minimum On Time 150 ns
D
MAX
Maximum Duty Cycle 95 %
Pin Descriptions
PIN
NUMBER PIN NAME PIN FUNCTION
1 SGND Control circuit negative supply
2 COSC Oscillator timing capacitor; F
OSC
can be approximated by: F
OSC
(kHz) = 0.1843/C
OSC
, C
OSC
in µF
3 VDD Control circuit positive supply
4 PGND Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET
5 PGND Ground return of the regulator; connected to the source of the low-side synchronous NMOS power FET
6 VIN Power supply input of the regulator; connected to the drain of the high-side NMOS power FET
7 VIN Power supply input of the regulator; connected to the drain of the high-side NMOS power FET
8 EN Chip enable, active high; a 2µA internal pull-up current enables the device if the pin is left open
9 PGND Ground return of the regulator
10 VHI Positive supply of the high-side driver
11 LX Inductor drive pin; high current digital output whose average voltage equals the regulator output voltage
12 LX Inductor drive pin; high current digital output whose average voltage equals the regulator output voltage
13 VDRV Positive supply of the low-side driver and input voltage for the high-side boot strap
14 FB Voltage feedback input; connected to an external resistor divider between V
OUT
and GND; a 125nA pull-up current
forces V
OUT
to V
S
in the event that FB is floating
15 VREF Bandgap reference bypass capacitor; typically 0.1µF to GND
16 PGND Ground return of the regulator
P1-P3P4-P6P7-P9

EL7562CUZ-T13

Mfr. #:
Buy EL7562CUZ-T13
Manufacturer:
Renesas / Intersil
Description:
Switching Voltage Regulators 2A DC-DC CNVRTR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet