MT8870DS1-1 Datasheet MT8870DS1, MT8870DSR1, MT8870DN1 | P1-P3

Zarlink Semiconductor Inc.

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

Features

• Complete DTMF Receiver

• Low power consumption

• Internal gain setting amplifier

• Adjustable guard time

• Central office quality

• Power-down mode

• Inhibit mode

• Backward compatible with MT8870C/MT8870C-1

Applications

• Receiver system for British Telecom (BT) or

CEPT Spec (MT8870D-1)

• Paging systems

• Repeater systems/mobile radio

• Credit card systems

• Remote control

• Personal computers

• Telephone answering machine

Description

The MT8870D/MT8870D-1 is a complete DTMF

receiver integrating both the bandsplit filter and digital

decoder functions. The filter section uses switched

capacitor techniques for high and low group filters;

the decoder uses digital counting techniques to detect

and decode all 16 DTMF tone-pairs into a 4-bit code.

October 2006

Ordering Information

MT8870DE 18 Pin PDIP Tubes

MT8870DS 18 Pin SOIC Tubes

MT8870DN 20 Pin SSOP Tubes

MT8870DSR 18 Pin SOIC Tape & Reel

MT8870DNR 20 Pin SSOP Tape & Reel

MT8870DN1 20 Pin SSOP* Tubes

MT8870DE1 18 Pin PDIP* Tubes

MT8870DS1 18 Pin SOIC* Tubes

MT8870DNR1 20 Pin SSOP* Tape & Reel

MT8870DSR1 18 Pin SOIC* Tape & Reel

MT8870DE1-1 18 Pin PDIP* Tubes

MT8870DS1-1 18 Pin SOIC* Tubes

MT8870DSR1-1 18 Pin SOIC* Tape & Reel

*Pb Free Matte Tin

-40°C to +85°C

MT8870D/MT8870D-1

ISO

-CMOS Integrated DTMF Receiver

Data Sheet

Figure 1 - Functional Block Diagram

PWDN

IN +

IN -

OSC1 OSC2 St/GT ESt STD TOE

VDD VSS VRef INH

Bias

Circuit

Dial

Tone

Filter

High Group

Filter

Low Group

Filter

Digital

Detection

Algorithm

Code

Converter

and Latch

Steering

Logic

Chip

Power

Chip

Bias

VRef

Buffer

Zero Crossing

Detectors

to all

Chip

Clocks

MT8870D/MT8870D-1 Data Sheet

Zarlink Semiconductor Inc.

External component count is minimized by on chip provision of a differential input amplifier, clock oscillator and

latched three-state bus interface.

Figure 2 - Pin Connections

Pin Description

Pin #

Name Description

18 20

11 IN+Non-Inverting Op-Amp (Input).

22 IN- Inverting Op-Amp (Input).

33 GSGain Select. Gives access to output of front end differential amplifier for connection of

feedback resistor.

44 V

Ref

Reference Voltage (Output). Nominally V

/2 is used to bias inputs at mid-rail (see Fig. 6

and Fig. 10).

55 INHInhibit (Input). Logic high inhibits the detection of tones representing characters A, B, C

and D. This pin input is internally pulled down.

66PWDNPower Down (Input). Active high. Powers down the device and inhibits the oscillator. This

pin input is internally pulled down.

78 OSC1Clock (Input).

89 OSC2Clock (Output). A 3.579545 MHz crystal connected between pins OSC1 and OSC2

completes the internal oscillator circuit.

910 V

Ground (Input). 0 V typical.

10 11 TOE Three State Output Enable (Input). Logic high enables the outputs Q1-Q4. This pin is

pulled up internally.

11-

12-

Q1-Q4 Three State Data (Output). When enabled by TOE, provide the code corresponding to the

last valid tone-pair received (see Table 1). When TOE is logic low, the data outputs are high

impedance.

15 17 StD Delayed Steering (Output).Presents a logic high when a received tone-pair has been

registered and the output latch updated; returns to logic low when the voltage on St/GT falls

below V

TSt

16 18 ESt Early Steering (Output). Presents a logic high once the digital algorithm has detected a

valid tone pair (signal condition). Any momentary loss of signal condition will cause ESt to

return to a logic low.

IN+

IN-

VRef

INH

PWDN

OSC1

OSC2

VSS

VDD

St/GT

ESt

StD

TOE

18 PIN PLASTIC DIP/SOIC

IN+

IN-

VRef

INH

PWDN

OSC1

OSC2

VSS

20 PIN SSOP

VDD

St/GT

ESt

StD

TOE

MT8870D/MT8870D-1 Data Sheet

Zarlink Semiconductor Inc.

Functional Description

The MT8870D/MT8870D-1 monolithic DTMF receiver offers small size, low power consumption and high

performance. Its architecture consists of a bandsplit filter section, which separates the high and low group tones,

followed by a digital counting section which verifies the frequency and duration of the received tones before passing

the corresponding code to the output bus.

Filter Section

Separation of the low-group and high group tones is achieved by applying the DTMF signal to the inputs of two

sixth-order switched capacitor bandpass filters, the bandwidths of which correspond to the low and high group

frequencies. The filter section also incorporates notches at 350 and 440 Hz for exceptional dial tone rejection (see

Figure 3). Each filter output is followed by a single order switched capacitor filter section which smooths the signals

prior to limiting. Limiting is performed by high-gain comparators which are provided with hysteresis to prevent

detection of unwanted low-level signals. The outputs of the comparators provide full rail logic swings at the

frequencies of the incoming DTMF signals.

Figure 3 - Filter Response

17 19 St/GT Steering Input/Guard time (Output) Bidirectional. A voltage greater than V

TSt

detected at

St causes the device to register the detected tone pair and update the output latch. A

voltage less than V

TSt

frees the device to accept a new tone pair. The GT output acts to

reset the external steering time-constant; its state is a function of ESt and the voltage on St.

18 20 V

Positive power supply (Input). +5 V typical.

NC No Connection.

Pin Description

Pin #

Name Description

18 20

ATTENUATION

(dB)

XY ABCD

1kHz

EF G H

PRECISE

DIAL TONES

X=350 Hz

Y=440 Hz

DTMF TONES

A=697 Hz

B=770 Hz

C=852 Hz

D=941 Hz

E=1209 Hz

F=1336 Hz

G=1477 Hz

H=1633 Hz

FREQUENCY (Hz)

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P19

MT8870DS1-1

Mfr. #:

Buy MT8870DS1-1

Manufacturer:

Microchip / Microsemi

Description:

Telecom Interface ICs Pb Free DTMF RECEIVER PREMIUM SOIC

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

T/T Paypal Visa MoneyGram Western Union

MT8870DS1-1

MT8870DS1-1

Products related to this Datasheet