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NBSG11BA

P1-P3P4-P6P7-P9P10-P12P13-P13
NBSG11
http://onsemi.com
7
Table 7. DC CHARACTERISTICS, NECL OR RSNECL INPUT WITH NECL OUTPUT
V
CC
= 0 V; V
EE
= -3.465 V to -2.375 V (Note 17)
Symbol
Characteristic
-40°C 25°C 70°C(LGA)/85°C(QFN)**
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Negative Power Supply Current 45 60 75 45 60 75 45 60 75 mA
VOH Output HIGH Voltage (Note 18) -1050 -970 -925 -975 -935 -900 -950 -910 -875 mV
V
OUTPP
Output Amplitude Voltage 350 410 525 350 410 525 350 410 525 mV
V
IH
Input HIGH Voltage (Single-Ended)
(Note 20)
V
CC
-
1435
mV
V
CC
-
1000
mV*
V
CC
V
CC
-
1435
mV
V
CC
-
1000
mV*
V
CC
V
CC
-
1435
mV
V
CC
-
1000
mV*
V
CC
V
V
IL
Input LOW Voltage (Single-Ended) (Note 21) V
IH
-
2.5 V
V
CC
-
1400
mV*
V
IH
-
150
mV
V
IH
-
2.5 V
V
CC
-
1400
mV*
V
IH
-
150
mV
V
IH
-
2.5 V
V
CC
-
1400
mV*
V
IH
-
150
mV
V
V
IHCMR
Input HIGH Voltage Common Mode Range
(Differential Configuration) (Note 19)
V
EE
+1.2 0.0 V
EE
+1.2 0.0 V
EE
+1.2 0.0 V
R
TIN
Internal Input Termination Resistor 45 50 55 45 50 55 45 50 55
W
I
IH
Input HIGH Current (@ V
IH
, V
IHMAX
) 80 150 80 150 80 150
mA
I
IL
Input LOW Current (@ V
IL
, V
ILMIN
) 25 100 25 100 25 100
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
17.Input and output parameters vary 1:1 with V
CC
.
18.All loading with 50 W to V
CC
- 2.0 V. V
OH
/V
OL
measured at V
IH
/V
IL
.
19.V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the differential
input signal.
20.V
IH
cannot exceed V
CC
.
21.V
IL
always ≥ V
EE
.
*Typicals used for testing purposes.
**The device packaged in FCLGA-16 have maximum temperature specification of 70°C and devices packaged in QFN-16 have maximum
temperature specification of 85°C.
NBSG11
http://onsemi.com
8
Table 8. AC CHARACTERISTICS for FCLGA-16
V
CC
= 0 V; V
EE
= -3.465 V to -2.375 V or V
CC
= 2.375 V to 3.465 V; V
EE
= 0 V
Symbol Characteristic
-40°C 25°C 70°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Frequency
(See Figure 4. F
max
/JITTER) (Note 22)
10.709 12 10.709 12 10.709 12 GHz
t
PLH
,
t
PHL
Propagation Delay to
Output Differential
90 125 160 90 125 160 90 125 160 ps
t
SKEW
Duty Cycle Skew (Note 23)
Within-Device Skew (Note 24)
Device-to-Device Skew (Note 25)
3
6
25
15
15
50
3
6
25
15
15
50
3
6
25
15
15
50
ps
t
JITTER
RMS Random Clock Jitter
f
in
< 10 GHz
Peak-to-Peak Data Dependent Jitter
f
in
< 10 Gb/s
0.2
TBD
1 0.2
TBD
1 0.2
TBD
1
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 26)
75 2600 75 2600 75 2600 mV
t
r
t
f
Output Rise/Fall Times Q, Q
(20% - 80%) @ 1 GHz
20 30 55 20 30 55 20 30 55 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
22.Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50 W to V
CC
- 2.0 V. For minimum f
max
value of 10.709 GHz,
output amplitude is approximately 200 mV (as shown in Figure 4, where output P-P spec is shown as a minimum/guarantee of around
150 mV). Input edge rates 40 ps (20% - 80%).
23.See Figure 5. t
SKEW
= |t
PLH
- t
PHL
| for a nominal 50% Differential Clock Input Waveform.
24.Within-Device skew is defined as identical transitions on similar paths through a device.
25.Device-to-device skew for identical transitions at identical V
CC
levels.
26.V
INPP
(MAX) cannot exceed V
CC
- V
EE
.
NBSG11
http://onsemi.com
9
Table 9. AC CHARACTERISTICS for QFN-16 V
CC
= 0 V; V
EE
= -3.465 V to -2.375 V or V
CC
= 2.375 V to 3.465 V; V
EE
= 0 V
Symbol
Characteristic
-40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
f
max
Maximum Frequency
(See Figure 4. F
max
/JITTER) (Note 27)
10.5 12 10.5 12 10.5 12 GHz
t
PLH
,
t
PHL
Propagation Delay to
Output Differential
90 125 160 90 125 160 90 125 160 ps
t
SKEW
Duty Cycle Skew (Note 28)
Within-Device Skew (Note 29)
Device-to-Device Skew (Note 30)
3
6
25
15
15
50
3
6
25
15
15
50
3
6
25
15
15
50
ps
t
JITTER
RMS Random Clock Jitter
f
in
< 10 GHz
Peak-to-Peak Data Dependent Jitter
f
in
< 10 Gb/s
0.2
TBD
1 0.2
TBD
1 0.2
TBD
1
ps
V
INPP
Input Voltage Swing/Sensitivity
(Differential Configuration) (Note 31)
75 2600 75 2600 75 2600 mV
t
r
t
f
Output Rise/Fall Times Q, Q
(20% - 80%) @ 1 GHz
15 30 55 20 30 55 20 30 55 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
27.Measured using a 500 mV source, 50% duty cycle clock source. All loading with 50 W to V
CC
-2.0 V. For minimum f
max
value of 10.5 GHz,
output amplitude is approximately 200 mV (as shown in Figure 4, where output P-P spec is shown as a minimum/guarantee of around
150 mV). Input edge rates 40 ps (20% - 80%).
28.See Figure 5. t
SKEW
= |t
PLH
- t
PHL
| for a nominal 50% Differential Clock Input Waveform.
29.Within-Device skew is defined as identical transitions on similar paths through a device.
30.Device-to-device skew for identical transitions at identical V
CC
levels.
31.V
INPP
(MAX) cannot exceed V
CC
- V
EE
.
0
100
200
300
400
500
600
123456789101112
INPUT FREQUENCY (GHz)
-0.5
0.5
1.5
2.5
3.5
4.5
5.5
6.5
7.5
8.5
9.5
Figure 4. Output Voltage Amplitude (V
OUTPP
) / RMS Jitter vs.
Input Frequency (f
in
) at Ambient Temperature (Typical)
OUTPUT VOLTAGE AMPLITUDE (mV)
JITTERout ps (RMS)
OUTPUT AMP.
OUTPUT P-P SPEC
RMS JITTER
P1-P3P4-P6P7-P9P10-P12P13-P13

NBSG11BA

Mfr. #:
Buy NBSG11BA
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 2.5V/3.3V SiGE 1:2
Lifecycle:
New from this manufacturer.
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