AD526
REV. D
–12–
FLOATING-POINT CONVERSION
High resolution converters are used in systems to obtain high
accuracy, improve system resolution or increase dynamic range.
There are a number of high resolution converters available with
throughput rates of 66.6 kHz that can be purchased as a single
component solution; however in order to achieve higher through-
put rates, alternative conversion techniques must be employed.
A floating point A/D converter can improve both throughput
rate and dynamic range of a system.
In a floating point A/D converter (Figure 42), the output data is
presented as a 16-bit word, the lower 12 bits from the A/D
converter form the mantissa and the upper 4 bits from the digi-
tal signal used to set the gain form the exponent. The AD526
programmable gain amplifier in conjunction with the compara-
tor circuit scales the input signal to a range between half scale
and full scale for the maximum usable resolution.
The A/D converter diagrammed in Figure 42 consists of a pair
of AD585 sample/hold amplifiers, a flash converter, a five-range
programmable gain amplifier (the AD526) and a fast 12-bit A/D
converter (the AD7572). The floating-point A/D converter
achieves its high throughput rate of 125 kHz by overlapping the
acquisition time of the first sample/hold amplifier and the set-
tling time of the AD526 with the conversion time of the A/D
converter. The first sample/hold amplifier holds the signal for
the flash autoranger, which determines which binary quantum
the input falls within, relative to full scale. Once the AD526 has
settled to the appropriate level, then the second sample/hold
amplifier can be put into hold which holds the amplified signal
while the AD7572 perform its conversion routine. The acquisi-
tion time for the AD585 is 3 µs, and the conversion time for the
AD7572 is 5 µs for a total of 8 µs, or 125 kHz. This performance
relies on the fast settling characteristics of the AD526 after the
flash autoranging (comparator) circuit quantizes the input sig-
nal. A 16-bit register holds the 3-bit output from the flash autor-
anger and the 12-bit output of the AD7572.
The A/D converter in Figure 42 has a dynamic range of 96 dB.
The dynamic range of a converter is the ratio of the full-scale
input range to the LSB value. With a floating-point A/D con-
verter the smallest value LSB corresponds to the LSB of the
monolithic converter divided by the maximum gain of the PGA.
The floating point A/D converter has a full-scale range of 5 V, a
maximum gain of 16 V/V from the AD526 and a 12-bit A/D
converter; this produces:
LSB = ([FSR/2
N
]/Gain) = ([5 V/4096]/16) = 76 µV. The
dynamic range in dBs is based on the log of the ratio of the
full-scale input range to the LSB; dynamic range = 20 log
(5 V/76 µV) = 96 dB.
74–
LS174
74–
LS174
74–
LS174
AD7572
LSB
MSB
V
IN
1/6
56
+
+
+
+
10kV
S/H
AD585
2.5MHz
+
+
1ms1/6
3
4
1/6
1
2
AD526
V
IN
B
F
S
A0 A1 A2
+
+
10kV
S/H
AD585
74-
123
1/2
CLOCK
125MHz
LM339A
1/4
10kV
10kV
10kV
10kV
1/4
1/4
1/4
1/4
+5V
1/6
+
+15V–15V
10mF
+
AD588
10mF
+15V–15V
+5V
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
E1
E2
E3
68pF
68pF
BUSY
47mF
10mF
10mF
+15V–15V
10mF
10mF
+15V–15V
10mF
+5V
+5V
50kV
30pF
+5V
10mF
+15V–15V
10mF
V
IN
+5V
10mF
10kV
+5V
REF
5kV
2.5kV
1.25kV
1.25kV
1mF
1
2
4
5
9
10
3
6
8
12
13
11
1
2
3
11 10
74ALS86
A0
A1
A2
NOTE: ALL BYPASS CAPACITORS ARE 0.1mF
Figure 42. Floating-Point A/D Converter
AD526
REV. D
–13–
HIGH ACCURACY A/D CONVERTERS
Very high accuracy and high resolution floating-point A/D con-
verters can be achieved by the incorporation of offset and gain
calibration routines. There are two techniques commonly used
for calibration, a hardware circuit as shown in Figure 43 and/or
a software routine. In this application the microprocessor is
functioning as the autoranging circuit, requiring software over-
head; therefore, a hardware calibration technique was applied
which reduces the software burden. The software is used to set
the gain of the AD526. In operation the signal is converted, and
if the MSB of the AD574 is not equal to a Logical 1, the gain is
increased by binary steps, up to the maximum gain. This maxi-
mizes the full-scale range of the conversion process and insures
a wide dynamic range.
The calibration technique uses two point correction, offset and
gain. The hardware is simplified by the use of programmable
magnitude comparators, the 74ALS528s, which can be “burned”
for a particular code. In order to prevent under or over range
hunting during the calibration process, the reference offset and
gain codes should be different from the endpoint codes. A cali-
bration cycle consists of selecting whether gain or offset is to be
calibrated then selecting the appropriate multiplexer channel to
apply the reference voltage to the signal channel. Once the op-
eration has been initiated, the counter, a 74ALS869, drives the
D/A converter in a linear fashion providing a small correction
voltage to either the gain or offset trim point of the AD574. The
output of the A/D converter is then compared to the value pre-
set in the 74ALS528 to determine a match. Once a match is
detected, the 74ALS528 produces a low going pulse which stops
the counter. The code at the D/A converter is latched until the
next calibration cycle. Calibration cycles are under the control
of the microprocessor in this application and should be imple-
mented only during periods of converter inactivity.
A2
A1
A4
A3
AD588
NOISE
REDUCTION
R8
R1
R2
R3
R4
R5
R6
1mF
+V
S
–V
S
–5V
+5V
+15V
–15V
SYS
GND
0.1mF
0.1mF
AD7501
V
IN1
V
IN2
V
IN3
V
IN4
DECODED
ADDRESS
AD526
DECODED
ADDRESS
WR WR
ADDRESS BUS
10kV
–15V +15V
AD585
–15V +15V
200pF
F
S
21
7404
OP27
+15V
–15V
V
REF
DE-
CODED
ADD
WR
+
+
+15V –15V+5V
10mF
10mF
MSB
LSB
+5V
50kV
1kV
AD574
DATA
BUS
1212
MSB
LSB
74ALS
528
GAIN
P = Q
+5V
MSB
LSB
74ALS
528
OFFSET
P = Q
+5V
7475
7475
1/2
+5V
+5V
7475
1/2
7400
1
3
2
7400
6
4
5
PIN 28
AD574
ADG221
CONTROL
LOGIC
INPUT
BUFFER
LATCH DAC A
LATCH DAC B
AD7628
WR A/B
V
REF
V
REF
WR
74ALS
869
MSB
LSB
CALIBRATION
PRESET
VALUE
+5V
+5V
5kV
RFB ARFB ARFB A
RFB B
A1
C1
2
R2
1
OUT A
AD712
R7
2
10kV
A2
AD712
R6
2
20kV
PIN 15
AD588
R5
20kV
R11
5kV
A3
C2
2
R4
1
OUT B
AD712
AGND
AGND
R9
2
10kV
R10
2
20kV
PIN 15
AD588
A2
AD712
R8
20kV
R12
5kV
AGND
OFFSET
GAIN
NOTE: ALL BYPASS CAPACITORS ARE 0.1mF
Figure 43. High Accuracy A/D Converter
AD526
REV. D
–14–
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Plastic
DIP Package (N-16)
16
18
9
PIN 1
SEATING
PLANE
0.100
(2.54)
0.87 (22.1) MAX
0.31
(7.87)
0.25
(6.25)
0.125 (3.18)
MIN
0.18
(4.57)
0.035
(0.89)
0.018
(0.46)
0.033
(0.84)
0.3 (7.62)
0.18
(4.57)
MAX
0.011
(0.28)
16-Lead Sided-Brazed
Ceramic Package (D-16)
16
1
8
9
PIN 1
0.265
(6.73)
0.290 0.010
(7.37 0.254)
0.430
(10.922)
0.040R
0.180 0.03
(4.57 0.762)
0.800 0.010
(20.32 0.254)
0.100
(2.54)
BSC
SEATING
PLANE
0.095 (2.41)
0.310 0.01
(7.874 0.254)
0.047 0.007
(1.19 0.18)
0.700 (17.78) BSC
+0.003
–0.002
0.017
+0.076
–0.05
(0.43 )
0.035 0.01
(0.889 0.254)
0.125
(3.175)
MIN
0.300
(7.62)
REF
0.085 (2.159)
0.010 0.002
(0.254 0.05)
PRINTED IN U.S.A.
C1103d–0–8/99

AD526ADZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Special Purpose Amplifiers IC SOFTWARE PROG GAIN AMP
Lifecycle:
New from this manufacturer.
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