83908I-02 Data Sheet
©2016 Integrated Device Technology, Inc Revision A March 17, 201611
APPLICATION INFORMATION
FIGURE 1. Crystal Input Interface
CRYSTAL INPUT INTERFACE
Figure 1 shows an example of 83908I-02 crystal interface with a
parallel resonant crystal. The frequency accuracy can be fi ne tuned
by adjusting the C1 and C2 values. For a parallel crystal with loading
capacitance CL = 18pF, we suggest C1 and C2 = 15pF to start
with. These values may be slightly fi ne tuned further to optimize the
frequency accuracy for different board layouts. Slightly increasing
the C1 and C2 values will slightly reduce the frequency. Slightly
decreasing the C1 and C2 values will slightly increase the frequency.
For the oscillator circuit below, R1 can be used, but is not required.
For new designs, it is recommended that R1 not be used.
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS signal
through an AC coupling capacitor. A general interface diagram is
shown in Figure 2. The XTAL_OUT pin can be left fl oating. The
input edge rate can be as slow as 10ns. For LVCMOS inputs, it
is recommended that the amplitude be reduced from full swing to
half swing in order to prevent signal interference with the power
rail and to reduce noise. This confi guration requires that the output
FIGURE 2. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
impedance of the driver (Ro) plus the series resistance (Rs) equals
the transmission line impedance. In addition, matched termination
at the crystal input will attenuate the signal in half. This can be done
in one of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50Ω applications, R1 and
R2 can be 100Ω. This can also be accomplished by removing R1
and making R2 50Ω.
R2
Zo = 50
VDD
Ro
Zo = Ro + Rs
R1
VDD
XTAL_IN
XTAL_OUT
.1uf
Rs
XTAL_IN
XTAL_OUT
C1
15p
C2
15p
X1
18pF Parallel Crystal
R1 (optional)
0
