F3 PWM controller
ICE3BS03LJG
Functional Description
Version 2.0 13 6 Dec 2007
Blanking is integrated in the current sense path for the
comparators C10, C12 and the PWM-OP.
The output of comparator C12 is activated by the AND
Gate G10 if Active Burst Mode is entered. When it is
activated, the current limiting is reduced to 0.25V. This
voltage level determines the maximum power level in
Active Burst Mode.
Furthermore, the comparator C11 is implemented to
detect dangerous current levels which could occur if
there is a short winding in the transformer or the
secondary diode is shorten. To ensure that there is no
accidentally entering of the Latched Mode by the
comparator C11, a 190ns spike blanking time is
integrated in the output path of comparator C11.
3.6.1 Leading Edge Blanking
Figure 18 Leading Edge Blanking
Whenever the power MOSFET is switched on, a
leading edge spike is generated due to the primary-
side capacitances and reverse recovery time of the
secondary-side rectifier. This spike can cause the gate
drive to switch off unintentionally. In order to avoid a
premature termination of the switching pulse, this spike
is blanked out with a time constant of t
LEB
= 220ns.
3.6.2 Propagation Delay Compensation
Figure 19 Current Limiting
In case of overcurrent detection, there is always
propagation delay to switch off the external power
MOSFET. An overshoot of the peak current I
peak
is
induced to the delay, which depends on the ratio of dI/
dt of the peak current (see Figure 19).
The overshoot of Signal2 is larger than of Signal1 due
to the steeper rising waveform. This change in the
slope is depending on the AC input voltage.
Propagation Delay Compensation is integrated to
reduce the overshoot due to dI/dt of the rising primary
current. Thus the propagation delay time between
exceeding the current sense threshold V
csth
and the
switching off of the external power MOSFET is
compensated over temperature within a wide range.
Current Limiting is then very accurate.
For example, I
peak
= 0.5A with R
Sense
= 2. The current
sense threshold is set to a static voltage level V
csth
=1V
without Propagation Delay Compensation. A current
ramp of dI/dt = 0.4A/µs, or dV
Sense
/dt = 0.8V/µs, and a
propagation delay time of t
Propagation Delay
=180ns leads
to an I
peak
overshoot of 14.4%. With the propagation
delay compensation, the overshoot is only around 2%
(see Figure 20).
Figure 20 Overcurrent Shutdown
Figure 21 Dynamic Voltage Threshold V
csth
t
V
Sense
V
csth
t
LEB
= 220ns
t
I
Sense
I
Limit
t
Propagation Delay
I
Overshoot1
I
peak1
Signal1Signal2
I
Overshoot2
I
peak2
0,9
0,95
1
1,05
1,1
1,15
1,2
1,25
1,3
0 0,2 0,4 0,6 0,8 1 1,2 1,4 1,6 1,8 2
with compensation
without compensation
dt
dV
Sense
s
V
µ
Sense
V
V
t
V
csth
V
OSC
Signal1 Signal2
V
Sense
Propagation Delay
max. Duty Cycle
off time
t
