MLX74190
Two-Fold High Power LF Initiator
With integrated Immobilizer
390107419001 Page 8 of 14 Sept-2014
Rev. 001 Product Preview
4 Device Description
4.1 Power supplies, internal regulation and references
The MLX74190 is supplied with VDD voltage of typically +5V and VS voltage between 6 to 40V, used for the
embedded drivers. Both voltages are internally monitored and the MLX74190 device enters the
corresponding under-voltage conditions if VDD or VS is going below the VDD_uv or Vs_uv thresholds.
4.2 System clock
The 32MHz internal system clock frequency is generated either from an external 2MHz clock signal provided
by an external device (usually coming from a microcontroller) or by using an external crystal resonator whose
frequency value is 4MHz. The recognition of the input clock source is done automatically during the start-up
phase.
4.3 Low Frequency Generation
The frequency generated by the LF driver can be set to a fixed value of 125 kHz or to a programmable value,
from 110 kHz up to 141.6 kHz.
4.4 Sine wave generation
In this mode, the generated output is a pure sinus signal, with a DC voltage value of VS/2 and a frequency
set according to the frequency generation values described above. The output voltage can also be adjusted
from 0.25Vpp up to 32Vpp.
4.5 Square wave generation
In this mode, the generated output is a square wave signal with amplitude fixed to the rail-to-rail value of the
driver supply voltage VS. The duty-cycle of the square wave signal can be configured to 4 values between
6.25% up to 50%.
4.6 Modulator
Each driver stage is able to modulate the LF carrier signal in ASK and PSK mode:
ASK: The amplitude of the carrier frequency is modulated from 0 to 100%
PSK: The phase of the carrier frequency on the output switches between 0° and 180°
4.7 Immobilizer ASK
The ASK demodulator converts the amplitude-modulated analog signal received on ASK_RXi pins from the
transponder into digital data which are accessible by the MCU through the D_OUT output pin. The data-rate
can be adjusted to 2kbps, 4kbps or 8kbps.
The ASK_RXi inputs are connected to the LF antenna through an external capacitive divider whose value will
depend on the antenna quality factor. The capacitive divider should be carefully calculated to avoid entering
into the clamping region which would strongly decrease the overall sensitivity.
