VNQ830PEP-E Datasheet VNQ830PEP-E, VNQ830PEPTR-E | P22-P24

Package and PC board thermal data VNQ830PEP-E

22/27 Doc ID 10871 Rev 8

Equation 1: pulse calculation formula:

where  = t

Table 16. Thermal parameters

Area/island (cm

)Footprint8

R1 = R7 = R9 = R11 (°C/W) 0.1

R2 = R8 = R10 = R12 (°C/W) 0.9

R3 (°C/W) 1

R4 (°C/W) 4

R5 (°C/W) 13.5

R6 (°C/W) 37 22

C1 = C7 = C9 = C11 (W.s/°C) 0.0006

C2 = C8 = C10 = C12 (W.s/°C) 0.0025

C3 (W.s/°C) 0.025

C4 (W.s/°C) 0.08

C5 (W.s/°C) 0.7

C6 (W.s/°C) 3 5

TH

 Z

THtp

1 –+=

VNQ830PEP-E Package and packing information

Doc ID 10871 Rev 8 23/27

5 Package and packing information

5.1 ECOPACK

packages

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK

packages, depending on their level of environmental compliance. ECOPACK

specifications, grade definitions and product status are available at: www.st.com

ECOPACK

is an ST trademark.

5.2 PowerSSO-24 mechanical data

Figure 31. PowerSSO-24 package dimensions

Package and packing information VNQ830PEP-E

24/27 Doc ID 10871 Rev 8

Table 17. PowerSSO-24 mechanical data

(1)

(2)

1. No intrusion allowed inwards the leads.

2. Flash or bleeds on exposed die pad shall not exceed 0.4 mm per side

Symbol

Millimeters

Min. Typ. Max.

A 2.45

A2 2.15 2.35

a1 0 0.10

b0.33 0.51

c0.23 0.32

(3)

3. “D and E” do not include mold flash or protusions.

Mold flash or protusions shall not exceed 0.15 mm.

10.10 10.50

(3)

7.40 7.60

e0.8

e3 8.8

F2.3

G 0.1

G1 0.06

H 10.1 10.5

h 0.4

k0° 8°

L0.55 0.85

O1.2

Q0.8

S2.9

T3.65

N 10º

X4.1 4.7

6.5

4.9

(4)

4. Variations for small window lead frame option.

7.1

5.5

(4)

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24 P25-P27

VNQ830PEP-E

Mfr. #:

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Manufacturer:

STMicroelectronics

Description:

Gate Drivers Quad Ch HiSide Drivr

Lifecycle:

New from this manufacturer.

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