74CBTLVD3861 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved.
Product data sheet Rev. 4 — 14 December 2011 4 of 19
NXP Semiconductors
74CBTLVD3861
10-bit level-shifting bus switch with output enable
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
7. Limiting values
[1] The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] For SSOP24 and TSSOP24 packages: P
tot
derates linearly with 5.5 mW/K above 60 C.
For DHVQFN24 package: P
tot
derates linearly at 4.5 mW/K above 60 C.
Table 2. Pin description
Symbol Pin Description
nc 1 not connected
A1 to A10 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 data input/output (A port)
GND 12 ground (0 V)
B1 to B10 22, 21, 20, 19, 18, 17, 16, 15, 14, 13 data input/output (B port)
OE
23 output enable input (active LOW)
V
CC
24 positive supply voltage
Table 3. Function selection
[1]
Input Input/output
OE An, Bn
LAn = Bn
HZ
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +4.6 V
V
I
input voltage
[1]
0.5 +4.6 V
V
SW
switch voltage enable and disable mode
[1]
0.5 V
CC
+ 0.5 V
I
IK
input clamping current V
I
< 0.5 V 50 - mA
I
SK
switch clamping current V
I
< 0.5 V 50 - mA
I
SW
switch current V
SW
= 0 V to V
CC
- 128 mA
I
CC
supply current - +100 mA
I
GND
ground current 100 - mA
T
stg
storage temperature 65 +150 C
P
tot
total power dissipation T
amb
= 40 Cto+125C
[2]
- 500 mW