6
FN6044.4
May 12, 2008
DYNAMIC CHARACTERISTICS
Inhibit Turn-ON Time, t
ON
V+ = 10.8V, V
NO
or V
NC
= 10V, R
L
= 300Ω, C
L
= 35pF
V
IN
= 0 to 4, (see Figure 1)
25 - 25 - ns
Full - 30 - ns
Inhibit Turn-OFF Time, t
OFF
V+ = 10.8V, V
NO
or V
NC
= 10V, R
L
= 300Ω, C
L
= 35pF
V
IN
= 0 to 4, (see Figure 1)
25 - 24 - ns
Full - 30 - ns
Address Transition Time, t
TRANS
V+ = 10.8V, V
NO
or V
NC
= 10V, R
L
= 300Ω, C
L
= 35pF
V
IN
= 0 to 4, (see Figure 1)
25 - 35 - ns
Full - 50 - ns
Break-Before-Make Time Delay, t
D
V+ = 13.0V, R
L
= 300Ω, C
L
= 35pF, V
NO
or V
NC
= 10V
V
IN
= 0 to 4 (see Figure 3)
Full - 9 - ns
Charge Injection, Q C
L
= 1.0nF, V
G
= 0V, R
G
= 0Ω (see Figure 2) 25 - 1.2 - pC
OFF-Isolation R
L
= 50Ω, C
L
= 5pF, f = 1MHz, (see Figure 4) 25 - 75 - dB
Crosstalk (Channel-to-Channel) R
L
= 50Ω, C
L
= 5pF, f = 1MHz, (see Figure 6) 25 - -85 - dB
NO or NC OFF Capacitance, C
OFF
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (see Figure 7) 25 - 4 - pF
COM OFF Capacitance,
C
COM(OFF)
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (see Figure 7) 25 - 6 - pF
COM ON Capacitance, C
COM(ON)
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (see Figure 7) 25 - 12 - pF
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+ V+ = 13.0V, V
IN
= 0V or V+, all channels on or off Full -1 0.0001 1 µA
NOTES:
6. V
IN
= input voltage to perform proper function.
7. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
8. Leakage parameter is 100% tested at high temp, and guaranteed by correlation at +25°C.
9. Δr
ON
= r
ON
(MAX) - r
ON
(MIN).
10. Flatness is defined as the difference between the maximum and minimum value of ON-resistance over the specified analog signal range.
11. Limits established by characterization and are not production tested.
12. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for other switches. C
L
includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
Electrical Specifications + 12V Supply Test Conditions: V+ = +10.8V to +13.2V, GND = 0V, V
INH
= 4V, V
INL
= 0.8V (Note 6),
Unless Otherwise Specified. (Continued)
PARAMETER TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 7, 12) TYP
MAX
(Notes 7, 12) UNITS
50%
t
r
< 20ns
t
f
< 20ns
t
ON
3V
0V
t
OFF
LOGIC
INPUT
SWITCH
OUTPUT
90%
0V
90%
V
OUT
V
OUT
V
(NO or NC)
R
L
R
L
r
ON
+
------------------------
=
LOGIC
INPUT
V
OUT
R
L
COM
NC
INH
300Ω
35pF
GND
V+
C
NO
C
L
V+
ADD
C
ISL43410
