9
FN6044.4
May 12, 2008
.
Power-Supply Considerations
The ISL43410 construction is typical of most CMOS analog
switches, except that they have only two supply pins: V+ and
GND. V+ and GND drive the internal CMOS switches and
set their analog voltage limits. Unlike switches with a 13V
maximum supply voltage, the ISL43410’s 15V maximum
supply voltage provides plenty of room for the 10% tolerance
of 12V supplies, as well as room for overshoot and noise
spikes.
The minimum recommended supply voltage is 2.0V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer
to the Electrical Specification” tables beginning on page 3
and “Typical Performance Curves” on page 10 for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to switched
V+ and GND signals to drive the analog switch gate
terminals.
This device cannot be operated with bipolar supplies
because the input switching point becomes negative in this
configuration.
Logic-Level Thresholds
The ISL43410 is TTL compatible (0.8V and 2.4V) over a
supply range of 3V to 11V (see Figure 11). At 12V, the V
IH
level is about 2.5V. This is still below the TTL guaranteed
high output minimum level of 2.8V, but noise margin is
reduced. For best results with a 12V supply, use a logic
family that provides a V
OH
greater than 3V.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails (see
Figure 12). Driving the digital input signals from GND to V+
with a fast transition time minimizes power dissipation. The
ISL43410 has been designed to minimize the supply current
whenever the digital input voltage is not driven to the supply
rails (0V to V+). For example, driving the device with 3V logic
(0V to 3V) while operating with a 5V supply, the device
draws only 10µA of current (see Figure 12 for
V
IN
= 3V).
Similar devices of competitors can draw 8x this amount of
current.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat even past
100MHz (see Figure 17). Figure 17 also illustrates that the
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
An OFF switch acts like a capacitor and passes higher
frequencies with less attenuation, resulting in signal feed
through from a switch’s input to its output. OFF-Isolation is
the resistance to this feed through, while crosstalk indicates
the amount of feed through from one switch to another.
Figure 18 details the high OFF-Isolation and crosstalk
rejection provided by this family. At 10MHz, OFF-Isolation is
about 55dB in 50Ω systems, decreasing approximately 20dB
per decade as frequency increases. Higher load
impedances decrease OFF-Isolation and crosstalk rejection
due to the voltage divider action of the switch OFF
impedance and the load impedance.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin and both V+ and GND. One of
these diodes conducts if any analog signal exceeds V+ or
GND.
Virtually all the analog leakage current comes from the ESD
diodes to V+ or GND. Although the ESD diodes on a given
signal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by either
V+ or GND and the analog signal. This means their leakages
will vary as the signal varies. The difference in the two diode
leakages to the V+ and GND pins constitutes the
analog-signal-path leakage current. All analog leakage
current flows between each pin and one of the supply
terminals, not to the other switch terminal. This is why both
sides of a given switch can show leakage currents of the
same or opposite polarity. There is no connection between
the analog signal paths and V+ or GND.
GND
V
COM
V
NO OR NC
OPTIONAL PROTECTION
V+
IN
DIODE
OPTIONAL PROTECTION
DIODE
OPTIONAL
PROTECTION
RESISTOR
FOR LOGIC
INPUTS
1kΩ
ADD
1kΩ
FIGURE 8. OVERVOLTAGE PROTECTION
ISL43410
