[AK4101A]
MS0250-E-01 2012/11
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Register Map
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
00H Clock/Format Control CRCE DIF2 DIF1 DIF0 CKS1 CKS0 MUTEN RSTN
01H Validity/fs Control V4 V3 V2 V1 FS3 FS2 FS1 FS0
02H
Ch 1 A-channel C-bit
buffer for Byte 0
CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
03H
Ch 1 A-channel C-bit
buffer for Byte 1
CA15 CA14 CA13 CA12 CA11 CA10 CA9 CA8
04H
Ch 1 A-channel C-bit
buffer for Byte 2
CA23 CA22 CA21 CA20 CA19 CA18 CA17 CA16
05H
Ch 1 A-channel C-bit
buffer for Byte 3
CA31 CA30 CA29 CA28 CA27 CA26 CA25 CA24
06H-
09H
Ch 1 B-channel C-bit
buffer for Byte 0-3
CB7
CB31
CB0
CB24
0AH-
0DH
Ch 1 A-channel U-bit
buffer for Byte 0-3
UA7
UA31
UA0
UA24
0EH-
11H
Ch 1 B-channel U-bit
buffer for Byte 0-3
UB7
UB31
UB0
UB24
12H-
15H
Ch 2 A-channel C-bit
buffer for Byte 0-3
16H-
19H
Ch 2 B-channel C-bit
buffer for Byte 0-3
1AH-
1DH
Ch 2 A-channel U-bit
buffer for Byte 0-3
1EH-
21H
Ch 2 B-channel U-bit
buffer for Byte 0-3
22H-
25H
Ch 3 A-channel C-bit
buffer for Byte 0-3
26H-
29H
Ch 3 B-channel C-bit
buffer for Byte 0-3
2AH-
2DH
Ch 3 A-channel U-bit
buffer for Byte 0-3
2EH-
31H
Ch 3 B-channel U-bit
buffer for Byte 0-3
32H-
35H
Ch 4 A-channel C-bit
buffer for Byte 0-3
36H-
39H
Ch 4 B-channel C-bit
buffer for Byte 0-3
3AH-
3DH
Ch 4 A-channel U-bit
buffer for Byte 0-3
3EH-
41H
Ch 4 B-channel U-bit
buffer for Byte 0-3
Table 7. Register Map
Notes:
(1) In stereo mode, A indicates Left Channel and B indicates Right Channel.
(2) In asynchronous mode, the DIF2-0 and CKS1-0 bits are logically “ORed” with the DIF2-0 and CKS1-0 pins.
(3) For addresses from 42H to FFH, data is not written.
(4) The PDN pin = “L” resets the registers to their default values.
[AK4101A]
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Register Definitions
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
00H Clock/Format Control CRCE DIF2 DIF1 DIF0 CKS1 CKS0 MUTEN RSTN
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Default 1 0 0 0 0 0 1 1
RSTN: Timing Reset.
0: Resets the internal frame and bit counters. Control registers are not initialized.
TXP pin is “H” and TXN pin is “L”. In normal mode, BLS pin is “H”.
1: Normal operation. (Default)
MUTEN: Power Down and Mute for Asynchronous Mode.
0: Power Down Command. Control registers are not initialized.
TXP and TXN pins are “L”. In normal mode, BLS pin is “H”.
1: Normal operation. (Default)
CKS1-0: Master Clock Frequency Select. (See
Table 1.)
Default: “00” (Mode 0: MCLK=128fs)
CKS1-0 bits are logically ORed with CKS1-0 pins.
DIF2-0: Audio Data Format. (See
Table 3.)
Default: “000” (Mode 0: 16bit right justified)
DIF2-0 bits are logically ORed with DIF2-0 pins.
CRCE: CRCC Enable at professional mode.
0: CRCC is not generated.
1: CRCC is generated in professional mode. In consumer mode, CRCC is not generated. (Default)
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
01H Validity/fs Control V4 V3 V2 V1 FS3 FS2 FS1 FS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Default 0 0 0 0 0 0 0 0
FS3-0: Sampling Frequency Select. (See
Table 4 and Table 5.)
Default: “0000” (“44.1kHz” in consumer mode; “Not defined” in professional mode. )
V1-4: Validity Flag for each channel.
0: Valid (Default)
1: Invalid
V12 pin V1 bit V2 bit V bit on TX1 V bit on TX2
0 0 0 0 0
0 0 1 0 1
0 1 0 1 0
0 1 1 1 1
1 0 0 1 1
1 0 1 1 1
1 1 0 1 1
1 1 1 1 1
Table 8. V bit setting at asynchronous mode
[AK4101A]
MS0250-E-01 2012/11
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Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
02H
Ch 1 A-channel C-bit
buffer for Byte 0
CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
06H
Ch 1 B-channel C-bit
buffer for Byte 0
CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
12H
Ch 2 A-channel C-bit
buffer for Byte 0
CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
16H
Ch 2 B-channel C-bit
buffer for Byte 0
CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
22H
Ch 3 A-channel C-bit
buffer for Byte 0
CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
26H
Ch 3 B-channel C-bit
buffer for Byte 0
CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
32H
Ch 4 A-channel C-bit
buffer for Byte 0
CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0
36H
Ch 4 B-channel C-bit
buffer for Byte 0
CB7 CB6 CB5 CB4 CB3 CB2 CB1 CB0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Default 0 0 0 0 0 1 0 0
C0-7: Channel Status Byte 0
Default: “00100000”
Addr Register Name D7 D6 D5 D4 D3 D2 D1 D0
03H
Ch 1 A-channel C-bit
buffer for Byte 1
CA15 CA14 CA13 CA12 CA11 CA10 CA9 CA8
07H
Ch 1 B-channel C-bit
buffer for Byte 1
CB15 CB14 CB13 CB12 CB11 CB10 CB9 CB8
13H
Ch 2 A-channel C-bit
buffer for Byte 1
CA15 CA14 CA13 CA12 CA11 CA10 CA9 CA8
17H
Ch 2 B-channel C-bit
buffer for Byte 1
CB15 CB14 CB13 CB12 CB11 CB10 CB9 CB8
23H
Ch 3 A-channel C-bit
buffer for Byte 1
CA15 CA14 CA13 CA12 CA11 CA10 CA9 CA8
27H
Ch 3 B-channel C-bit
buffer for Byte 1
CB15 CB14 CB13 CB12 CB11 CB10 CB9 CB8
33H
Ch 4 A-channel C-bit
buffer for Byte 1
CA15 CA14 CA13 CA12 CA11 CA10 CA9 CA8
37H
Ch 4 B-channel C-bit
buffer for Byte 1
CB15 CB14 CB13 CB12 CB11 CB10 CB9 CB8
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Default 0 0 0 0 0 0 0 0
C8-15: Channel Status Byte 1
Default: “00000000”

AK4101AVQ

Mfr. #:
Manufacturer:
Description:
IC TX RS422 QUAD 44LQFP
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New from this manufacturer.
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