_______________Detailed Description
The MAX5150/MAX5151 dual, 13-bit, voltage-output
DACs are easily configured with a 3-wire serial inter-
face. These devices include a 16-bit data-in/data-out
shift register, and each DAC has a double-buffered
input composed of an input register and a DAC register
(see
Functional Diagram
). In addition, trimmed internal
resistors produce an internal gain of +2 that maximizes
output voltage swing. The amplifier’s offset-adjust pin
allows for a DC shift in the DAC’s output.
Both DACs use an inverted R-2R ladder network that
produces a weighted voltage proportional to the input
voltage value. Each DAC has its own reference input to
facilitate independent full-scale values. Figure 1
depicts a simplified circuit diagram of one of the two
DACs.
Reference Inputs
The reference inputs accept both AC and DC values
with a voltage range extending from 0V to (V
DD
- 1.4V).
Determine the output voltage using the following equa-
tion (OS_ = AGND):
V
OUT
= (V
REF
x NB / 8192) x 2
where NB is the numeric value of the DAC’s binary
input code (0 to 8191) and V
REF
is the reference volt-
age.
The reference input impedance ranges from 14kΩ
(1555 hex) to several giga ohms (with an input code of
0000 hex). The reference input capacitance is code
dependent and typically ranges from 15pF with an
input code of all zeros to 50pF with an input code of all
ones.
Output Amplifier
The output amplifiers on the MAX5150/MAX5151 have
internal resistors that provide for a gain of +2 when OS_
is connected to AGND. These resistors are trimmed to
minimize gain error. The output amplifiers have a typi-
cal slew rate of 0.75V/µs and settle to 1/2LSB within
16µs, with a load of 10kΩ in parallel with 100pF. Loads
less than 2kΩ degrade performance.
The OS_ pin can be used to produce an adjustable off-
set voltage at the output. For instance, to achieve a 1V
offset, apply -1V to the OS_ pin to produce an output
range from 1V to (1V + V
REF
x 2). Note that the DAC’s
output range is still limited by the maximum output volt-
age specification.
Power-Down Mode
The MAX5150/MAX5151 feature a software-program-
mable shutdown mode that reduces the typical supply
current to 2µA. The two DACs can be shutdown inde-
pendently, or simultaneously using the appropriate pro-
gramming command. Enter shutdown mode by writing
the appropriate input-control word (Table 1). In shut-
down mode, the reference inputs and amplifier out-
MAX5150/MAX5151
Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface
_______________________________________________________________________________________ 9
Digital GroundDGND9
Serial-Data OutputDOUT10
User-Programmable OutputUPO11
Power-Down Lockout. The device can-
not be powered down when PDL is low.
PDL
12
Reference for DAC BREFB13
Clears all DACs and registers
(resets to 0).
CL
5
Chip-Select Input
CS
6
Serial-Data Input DIN7
Serial-Register Clock Input SCLK8
Reference for DAC A REFA4
DAC A Offset AdjustmentOSA3
PIN
DAC A Output Voltage OUTA2
Analog Ground AGND1
FUNCTIONNAME
14 OSB DAC B Offset Adjustment
15 OUTB DAC B Output Voltage
16 V
DD
Positive Power Supply
