1. General description
The 74AUP1T1326 is a high-performance, low-power, low-voltage, single-bit, dual supply
buffer/line driver with output enable circuitry.
The 74AUP1T1326 is designed for logic-level translation applications and combines the
functions of the 74AUP1G32 and 74AUP1G126. The buffer/line driver is controlled by two
output enable Schmitt trigger inputs (1OE and 2OE) through an OR-gate. The output
enable inputs accept standard input signals and are capable of transforming slowly
changing input signals into sharply defined, jitter-free output signals. The output of the
OR-gate is also available at output 1Y.
The output enable inputs (1OE and 2OE) switch at different points for positive and
negative-going signals. The difference between the positive voltage V
T+
and the negative
voltage V
T−
is defined as the input hysteresis voltage V
H
.
Both V
CC(A)
and V
CC(B)
can be supplied at any voltage between 1.1 V and 3.6 V making
the device suitable for interfacing between any of the low voltage nodes (1.2 V, 1.5 V,
1.8 V, 2.5 V and 3.3 V) with compatible input levels. Pins 1OE, 2OE and 1Y are referenced
to V
CC(A)
and pins A and 2Y are referenced to V
CC(B)
. A logic LOW on both output enable
pins causes the output 2Y to assume a high-impedance OFF-state.
The device ensures low static and dynamic power consumption and is fully specified for
partial power down applications using I
OFF
. The I
OFF
circuitry disables the outputs,
preventing any damaging backflow current through the device when it is powered down.
2. Features
n Wide supply voltage range:
u V
CC(A)
: 1.1 V to 3.6 V; V
CC(B)
: 1.1 V to 3.6 V.
n High noise immunity
n Complies with JEDEC standards:
u JESD8-7 (1.2 V to 1.95 V)
u JESD8-5 (1.8 V to 2.7 V)
u JESD8-B (2.7 V to 3.6 V)
n ESD protection:
u HBM JESD22-A114E Class 2A exceeds 2000 V
u MM JESD22-A115-A exceeds 200 V
u CDM JESD22-C101C exceeds 1000 V
n Low static power consumption; I
CC
= 0.9 µA (maximum)
n Latch-up performance exceeds 100 mA per JESD 78 Class II
n Inputs accept voltages up to 3.6 V
74AUP1T1326
Low-power dual supply buffer/line driver; 3-state
Rev. 01 — 20 January 2009 Product data sheet
