MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
10 ______________________________________________________________________________________
voltage exceeds the V
COMP
signal or the current-limit
threshold is exceeded. The low-side switch is then
turned on for the remainder of the oscillator cycle.
Current Limit
The internal, high-side MOSFET has a typical 11A peak
current-limit threshold. When current flowing out of LX
exceeds this limit, the high-side MOSFET turns off and
the synchronous rectifier turns on. The synchronous
rectifier remains on until the inductor current falls below
the low-side current limit. This lowers the duty cycle
and causes the output voltage to droop until the current
limit is no longer exceeded. The MAX8646 uses a hic-
cup mode to prevent overheating during short-circuit
output conditions.
During current limit if V
FB
drops below 420mV and
stays below this level for 12µs or more, the part enters
hiccup mode. The high-side MOSFET and the synchro-
nous rectifier are turned off and both COMP and REFIN
are internally pulled low. If REFIN and SS are connect-
ed together, then both are pulled low. The part remains
in this state for 1024 clock cycles and then attempts to
restart for 128 clock cycles. If the fault causing current
limit has cleared, the part resumes normal operation.
Otherwise, the part reenters hiccup mode again.
Soft-Start and REFIN
The MAX8646 utilizes an adjustable soft-start function
to limit inrush current during startup. An 8µA (typ) cur-
rent source charges an external capacitor connected to
SS. The soft-start time is adjusted by the value of the
external capacitor from SS to GND. The required
capacitance value is determined as:
where t
SS
is the required soft-start time in seconds. The
MAX8646 also features an external reference input
(REFIN). The IC regulates FB to the voltage applied to
REFIN. The internal soft-start is not available when
using an external reference. A method of soft-start
when using an external reference is shown in Figure 2.
Connect REFIN to SS to use the internal 0.6V reference.
Undervoltage Lockout (UVLO)
The UVLO circuitry inhibits switching when V
DD
is below
2V (typ). Once V
DD
rises above 2V (typ), UVLO clears
and the soft-start function activates. A 100mV hysteresis
is built in for glitch immunity. Figure 3 is the type III com-
pensation network.
BST
The gate-drive voltage for the high-side, n-channel
switch is generated by a flying-capacitor boost circuit.
The capacitor between BST and LX is charged from the
V
IN
supply while the low-side MOSFET is on. When the
low-side MOSFET is switched off, the voltage of the
capacitor is stacked above LX to provide the necessary
turn-on voltage for the high-side internal MOSFET.
Frequency Select (FREQ)
The switching frequency is resistor programmable from
500kHz to 2MHz. Set the switching frequency of the IC
with a resistor (R
FREQ
) connected from FREQ to GND.
R
FREQ
is calculated as:
where f
S
is the desired switching frequency in Hz.
Power-Good Output (PWRGD)
PWRGD is an open-drain output that goes high imped-
ance when V
FB
is above 0.9 x V
REFIN
. PWRGD pulls
low when V
FB
is below 90% of its regulation for at least
48 clock cycles. PWRGD is low during shutdown.
Programming the Output Voltage
(CTL1, CTL2)
As shown in Table 1, the output voltage is pin program-
mable by the logic states of CTL1 and CTL2. CTL1 and
CTL2 are tri-level inputs: V
DD
, unconnected, and GND.
The logic states of CTL1 and CTL2 should be pro-
grammed only before power-up. Once the part is
enabled, CTL1 and CTL2 should not be changed. If the
output voltage needs to be reprogrammed, cycle
power or EN and reprogram before enabling.
R
k
µs f
µs
FREQ
S
49 9
095
1
005
.
.
(.)
C
At
V
SS
=
×8
06
µ
.
C
R2
R1
REFIN
MAX8646
Figure 2. Typical Soft-Start Implementation with External
Reference
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
______________________________________________________________________________________ 11
Shutdown Mode
Drive EN to GND to shut down the IC and reduce quies-
cent current to less than 12µA. During shutdown, the LX
is high impedance. Drive EN high to enable the
MAX8646.
Thermal Protection
Thermal-overload protection limits total power dissipation
in the device. When the junction temperature exceeds T
J
= +165°C, a thermal sensor forces the device into shut-
down, allowing the die to cool. The thermal sensor turns
the device on again after the junction temperature cools
by 20°C, causing a pulsed output during continuous
overload conditions. The soft-start sequence begins after
recovery from a thermal-shutdown condition.
Applications Information
IN and V
DD
Decoupling
To decrease the noise effects due to the high switching
frequency and maximize the output accuracy of
the MAX8646, decouple V
IN
with a 22µF capacitor from
V
IN
to PGND. Also decouple V
DD
with a 1µF from V
DD
to GND. Place these capacitors as close to the IC
as possible.
Inductor Selection
Choose an inductor with the following equation:
where LIR is the ratio of the inductor ripple current to full
load current at the minimum duty cycle. Choose LIR
between 20% to 40% for best performance and stability.
Use an inductor with the lowest possible DC resistance
that fits in the allotted dimensions. Powdered iron ferrite
core types are often the best choice for performance.
With any core material, the core must be large enough
not to saturate at the current limit of the MAX8646.
Output-Capacitor Selection
The key selection parameters for the output capacitor are
capacitance, ESR, ESL, and voltage-rating requirements.
These affect the overall stability, output ripple voltage,
and transient response of the DC-DC converter. The out-
put ripple occurs due to variations in the charge stored
in the output capacitor, the voltage drop due to the
capacitor’s ESR, and the voltage drop due to the
capacitor’s ESL. Calculate the output voltage ripple
due to the output capacitance, ESR, and ESL:
where the output ripple due to output capacitance,
ESR, and ESL is:
or:
or whichever is larger.
The peak inductor current (I
P-P
) is:
Use these equations for initial capacitor selection.
Determine final values by testing a prototype or an
evaluation circuit. A smaller ripple current results in less
output-voltage ripple. Since the inductor ripple current
is a factor of the inductor value, the output voltage rip-
ple decreases with larger inductance. Use ceramic
capacitors for low ESR and low ESL at the switching
frequency of the converter. The ripple voltage due to
ESL is negligible when using ceramic capacitors.
Load-transient response depends on the selected out-
put capacitance. During a load transient, the output
instantly changes by ESR x I
LOAD
. Before the con-
troller can respond, the output deviates further,
depending on the inductor and output capacitor val-
ues. After a short time, the controller responds by regu-
I
VV
fL
x
V
V
PP
IN OUT
S
OUT
IN
=
×
V
I
t
x ESL
RIPPLE ESL
PP
OFF
()
=
V
I
t
x ESL
RIPPLE ESL
PP
ON
()
=
V I x ESR
RIPPLE ESR P P()
=
V
I
xC xf
RIPPLE C
PP
OU
T
S
()
=
8
VV
VV
RIPPLE RIPPLE C
RIPPLE ESR RIPPLE ESL
=+
+
()
() ()
L
VVV
f V LIR I
OUT IN OUT
S IN OUT MAX
=
×−
×××
()
()
CTL1 CTL2 V
OUT
(V)
GND GND 0.6
V
DD
V
DD
0.7
GND Unconnected 0.8
GND V
DD
1.0
Unconnected GND 1.2
Unconnected Unconnected 1.5
Unconnected V
DD
1.8
V
DD
GND 2.0
V
DD
Unconnected 2.5
Table 1. CTL1 and CTL2 Output Voltage
Selection
MAX8646
6A, 2MHz Step-Down Regulator
with Integrated Switches
12 ______________________________________________________________________________________
lating the output voltage back to its predetermined
value. The controller response time depends on the
closed-loop bandwidth. A higher bandwidth yields a
faster response time, preventing the output from deviat-
ing further from its regulating value. See the
Compen-
sation Design
section for more details.
Input-Capacitor Selection
The input capacitor reduces the current peaks drawn
from the input power supply and reduces switching
noise in the IC. The total input capacitance must be
equal or greater than the value given by the following
equation to keep the input-ripple voltage within specs
and minimize the high-frequency ripple current being
fed back to the input source:
where V
IN-RIPPLE
is the maximum allowed input ripple
voltage across the input capacitors and is recommend-
ed to be less than 2% of the minimum input voltage. D
is the duty cycle (V
OUT
/V
IN
) and T
S
is the switching
period (1/f
S
).
The impedance of the input capacitor at the switching
frequency should be less than that of the input source so
high-frequency switching currents do not pass through
the input source but are instead shunted through the
input capacitor. High source impedance requires high
input capacitance. The input capacitor must meet the
ripple current requirement imposed by the switching cur-
rents. The RMS input ripple current is given by:
where I
RIPPLE
is the input RMS ripple current.
Compensation Design
The power transfer function consists of one double pole
and one zero. The double pole is introduced by the out-
put filtering inductor L and the output filtering capacitor
C
O
. The ESR of the output filtering capacitor deter-
mines the zero. The double pole and zero frequencies
are given as follows:
where R
L
is equal to the sum of the output inductor’s
DCR and the internal switch resistance, R
DS(ON)
. A typi-
cal value for R
DS(ON)
is 23m. R
O
is the output load
resistance, which is equal to the rated output voltage
divided by the rated output current. ESR is the total
equivalent series resistance of the output filtering capaci-
tor. If there is more than one output capacitor of the same
type in parallel, the value of the ESR in the above equa-
tion is equal to that of the ESR of a single output capaci-
tor divided by the total number of output capacitors.
The high switching frequency range of the MAX8646
allows the use of ceramic output capacitors. Since the
ESR of ceramic capacitors is typically very low, the fre-
quency of the associated transfer function zero is higher
than the unity-gain crossover frequency, f
C
, and the zero
cannot be used to compensate for the double pole creat-
ed by the output filtering inductor and capacitor. The dou-
ble pole produces a gain drop of 40dB/decade and a
phase shift of 180°/decade. The error amplifier must com-
pensate for this gain drop and phase shift to achieve a
stable high-bandwidth closed-loop system. Therefore,
use type III compensation as shown in Figures 3 and 4.
Type III compensation possesses three poles and two
zeros with the first pole, f
P1_EA
, located at zero frequency
(DC). Locations of other poles and zeros of the type III
compensation are given by:
The above equations are based on the assumptions
that C1>>C2, and R3>>R2, which are true in most
applications. Placements of these poles and zeros are
determined by the frequencies of the double pole and
ESR zero of the power transfer function. It is also a
function of the desired close-loop bandwidth. The fol-
lowing section outlines the step-by-step design proce-
dure to calculate the required compensation
components for the MAX8646. When the output voltage
of the MAX8646 is programmed to a preset voltage, R3
is internal to the IC and R4 does not exist (Figure 3b).
When externally programming the MAX8646 (Figure
3a), the output voltage is determined by:
f
RC
PEA2
1
223
_
=
××π
f
RC
PEA3
1
212
_
=
××π
f
RC
ZEA2
1
233
_
=
××π
f
RC
ZEA1
1
211
_
=
××π
f
x ESR x C
Z ESR
O
_
=
1
2π
ff
xLxC x
R ESR
RR
PLC P LC
O
O
OL
12
1
2
__
==
+
+
π
II
VVV
V
RIPPLE LOAD
OUT IN OUT
IN
×−()
C
DxT xI
V
IN MIN
S OUT
IN RIPPLE
_
=

MAX8646ETG+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Voltage Regulators 6A 2MHz Step-Down Regulator w/Switch
Lifecycle:
New from this manufacturer.
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