74ABT543CSC

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74ABT543
DC Electrical Characteristics
(SOIC Package)
Note 6: Max number of outputs defined as (n). n 1 data inputs are driven 0V to 3V. One output at LOW. Guaranteed, but not tested.
Note 7: Max number of outputs defined as (n). n1 data inputs are driven 0V to 3V. One output HIGH. Guaranteed, but not tested.
Note 8: Max number of data inputs (n) switching. n 1 inputs switching 0V to 3V. Input-under-test switching: 3V to threshold (V
ILD
), 0V to threshold (V
IHD
).
Guaranteed, but not tested.
AC Electrical Characteristics
(SOIC and SSOP Packages)
AC Operating Requirements
(SOIC and SSOP Packages)
Conditions
Symbol Parameter Min Typ Max Units
V
CC
C
L
= 50 pF,
R
L
= 500
V
OLP
Quiet Output Maximum Dynamic V
OL
0.7 1.0 V 5.0 T
A
= 25°C (Note 6)
V
OLV
Quiet Output Minimum Dynamic V
OL
1.2 0.8 V 5.0 T
A
= 25°C (Note 6)
V
OHV
Minimum HIGH Level Dynamic Output Voltage 2.5 3.0 V 5.0 T
A
= 25°C (Note 7)
V
IHD
Minimum HIGH Level Dynamic Input Voltage 2.0 1.7 V 5.0 T
A
= 25°C (Note 8)
V
ILD
Maximum LOW Level Dynamic Input Voltage 0.7 0.9 V 5.0 T
A
= 25°C (Note 8)
Symbol Parameter
T
A
= +25°CT
A
= 40°C to +85°C
Units
V
CC
= +5.0V V
CC
= 4.5V–5.5V
C
L
= 50 pF C
L
= 50 pF
Min Typ Max Min Max
t
PLH
Propagation Delay 1.5 3.1 4.8 1.5 4.8 ns
t
PHL
A
n
to B
n
or B
n
to A
n
1.5 4.8 1.5 4.8
t
PLH
Propagation Delay
t
PHL
LEAB to B
n
, LEBA to A
n
1.6
3.4
5.3 1.6 5.3
ns
OEBA or OEAB to A
n
or B
n
1.6 5.3 1.6 5.3
t
PZH
Enable Time
t
PZL
LEAB to B
n
, LEBA to A
n
1.5
3.6
5.8 1.5 5.8
ns
OEBA or OEAB to A
n
or B
n
1.5 5.8 1.5 5.8
t
PHZ
Disable Time 2.0 4.0 6.5 2.0 6.5 ns
t
PLZ
CEBA or CEAB to A
n
or B
n
2.0 6.5 2.0 6.5
Symbol Parameter
T
A
= +25°CT
A
= 40°C to +85°C
Units
V
CC
= +5.0V V
CC
= 4.5V–5.5V
C
L
= 50 pF C
L
= 50 pF
MinMaxMinMax
t
S
(H) Setup Time, HIGH or LOW 1.5 1.5 ns
t
S
(L)
A
n
or B
n
to LEBA or LEAB
1.5 1.5
t
H
(H) Hold Time, HIGH or LOW 1.0 1.0 ns
t
H
(L)
A
n
or B
n
to LEBA or LEAB
1.0 1.0
t
S
(H) Setup Time, HIGH or LOW 1.5 1.5 ns
t
S
(L)
A
n
or B
n
to CEAB or CEBA
1.5 1.5
t
H
(H) Hold Time, HIGH or LOW 1.3 1.3 ns
t
H
(L)
A
n
or B
n
to CEAB or CEBA
1.3 1.3
t
W
(L) Pulse Width, LOW 3.0 3.0 ns
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74ABT543
Extended AC Electrical Characteristics
(SOIC Package)
Note 9: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 10: This specification is guaranteed but not tested. The limits represent propagation delay with 250pF load capacitors in place of the 50 pF load capac-
itors in the standard AC load. This specification pertains to single output switching only.
Note 11: This specification is guaranteed but not tested. The limits represent propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.) with 250 pF load capacitors in place of the 50 pF load capacitors in the standard AC load.
Note 12: The 3-STATE delay times are dominated by the RC network (500, 250 pF) on the output and has been excluded from the datasheet
Skew
(SOIC Package)
Note 13: This specification is guaranteed but not tested. The limits apply to propagation delays for all paths described switching in phase (i.e., all LOW-to-
HIGH, HIGH-to-LOW, etc.).
Note 14: This specification is guaranteed but not tested. The limits represent propagation delays with 250 pF load capacitors in place of the 50 pF load
capacitors in the standard AC load.
Note 15: Skew is defined as the absolute value of the difference between the actual propagation delays for any two separate outputs of the same device.
The specification applies to any outputs switching HIGH-to-LOW (t
OSHL
), LOW-to-HIGH (t
OSLH
), or any combination switching LOW-to-HIGH and/or HIGH-
to-LOW (t
OST
). This specification is guaranteed but not tested.
Note 16: This describes the difference between the delay of the LOW-to-HIGH and the HIGH-to-LOW transition on the same pin. It is measured across all
the outputs (drivers) on the same chip, the worst (largest delta) number is the guaranteed specification. This specification is guaranteed but not tested.
Note 17: Propagation delay variation for a given set of conditions (i.e., temperature and V
CC
) from device to device. This specification is guaranteed but not
tested.
Symbol Parameter
T
A
= 40°C to +85°CT
A
= 40°C to +85°CT
A
= 40°C to +85°C
Units
V
CC
= 4.5V–5.5V V
CC
= 4.5V–5.5V V
CC
= 4.5V–5.5V
C
L
= 50 pF C
L
= 250 pF C
L
= 250 pF
8 Outputs Switching 1 Output Switching 8 Outputs Switching
(Note 9) (Note 10) (Note 11)
Min Typ Max Min Max Min Max
f
TOGGLE
Max Toggle Frequency 100 MHz
t
PLH
Propagation Delay 1.5 6.2 2.0 7.5 2.5 10.0 ns
t
PHL
A
n
to B
n
or B
n
to A
n
1.5 6.2 2.0 7.5 2.5 10.0
t
PLH
Propagation Delay 1.5 6.5 2.0 8.0 2.5 10.5 ns
t
PHL
LEAB to B
n
, LEBA to A
n
1.5 6.5 2.0 8.0 2.5 10.5
t
PZH
Output Enable Time
t
PZL
OEBA or OEAB to A
n
or B
n
1.5 7.5 2.0 8.5 2.5 11.0 ns
CEBA or CEAB to A
n
or B
n
1.5 7.5 2.0 8.5 2.5 11.0
t
PHZ
Output Disable Time
t
PLZ
OEBA or OEAB to A
n
or B
n
1.5 8.5
(Note 12) (Note 12) ns
CEBA or CEAB to A
n
or B
n
1.5 8.5
Symbol Parameter
T
A
= 40°C to +85°CT
A
= 40°C to +85°C
Units
V
CC
= 4.5V–5.5V V
CC
= 4.5V–5.5V
C
L
= 50 pF C
L
= 250 pF
8 Outputs Switching 8 Outputs Switching
(Note 13) (Note 14)
Max Max
t
OSHL
Pin to Pin Skew 1.0 2.0 ns
(Note 15) HL Transitions
t
OSLH
Pin to Pin Skew 1.3 2.0 ns
(Note 15) LH Transitions
t
PS
Duty Cycle 2.0 4.0 ns
(Note 16) LH–HL Skew
t
OST
Pin to Pin Skew 2.0 4.0 ns
(Note 15) LH/HL Transitions
t
PV
Device to Device Skew 2.5 4.5 ns
(Note 17) LH/HL Transitions
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74ABT543
Capacitance
Note 18: C
I/O
is measured at frequency, f = 1 MHz, PER MLT-STD-883B, METHOD 3012.
AC Loading
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
FIGURE 2. V
M
= 1.5V
Input Pulse Requirements
FIGURE 3. Test Input Signal Requirements
AC Waveforms
FIGURE 4. Propagation Delay Waveforms for Inverting
and Non-Inverting Functions
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
FIGURE 6. 3-STATE Output HIGH
and LOW Enable and Disable Times
FIGURE 7. Setup Time, Hold Time
and Recovery Time Waveforms
Symbol Parameter Typ Units
Conditions: T
A
= 25°C
C
IN
Input Capacitance 5.0 pF V
CC
= 0V (non I/O pins)
C
I/O
(Note 18) Output Capacitance 11.0 pF V
CC
= 5.0V (A
n
, B
n
)
Amplitude Rep. Rate t
W
t
r
t
f
3V 1 MHz 500 ns 2.5 ns 2.5 ns

74ABT543CSC

Mfr. #:
Manufacturer:
ON Semiconductor / Fairchild
Description:
Bus Transceivers Oct Registered Trans
Lifecycle:
New from this manufacturer.
Delivery:
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