MAX1636EAP+ Datasheet MAX1636EAP+, MAX1636EAP+T | P16-P18

MAX1636

Ringing at the high-side MOSFET gate (DH) in discon-

tinuous-conduction mode (light loads) is a natural oper-

ating condition. It is caused by residual energy in the

tank circuit, formed by the inductor and stray capaci-

tance at the switching node, LX. The gate-drive nega-

tive rail is referred to LX, so any ringing there is directly

coupled to the gate-drive output.

Current-Limiting and Current-Sense Inputs

(CSH and CSL)

The current-limit circuit resets the main PWM latch and

turns off the high-side MOSFET switch whenever the

voltage difference between CSH and CSL exceeds

100mV. This limiting is effective for both current flow

directions, putting the threshold limit at ±100mV. The

tolerance on the positive current limit is ±20%, so the

external low-value sense resistor (R1) must be sized for

80mV/I

PEAK

, where I

PEAK

is the required peak inductor

current to support the full load current. Components

must be designed to withstand continuous current

stresses of 120mV/R1.

For breadboarding or for very high current applications,

it may be useful to wire the current-sense inputs with a

twisted pair rather than PC traces (two pieces of

wrapped wire twisted together are sufficient.) This

reduces the noise picked up at CSH and CSL, which

can cause unstable switching and reduced output cur-

rent.

Oscillator Frequency and Synchronization

(SYNC)

The SYNC input controls the oscillator frequency. Low

selects 200kHz; high selects 300kHz. SYNC can also

be used to synchronize with an external 5V CMOS or

TTL clock generator. SYNC has a guaranteed 240kHz

to 340kHz capture range. A high-to-low transition on

SYNC initiates a new cycle.

Operation at 300kHz optimizes the application circuit

for component size and cost. Operation at 200kHz pro-

vides increased efficiency, lower dropout, and

improved load-transient response at low input-output

voltage differences (see the Low-Voltage Operation

section).

Output Voltage Accuracy (GND, CC)

Output voltage error is guaranteed to be within ±1%

over all conditions of line, load, and temperature. The

DC load regulation is typically better than 0.1% due to

the integrator amplifier. Transient response is optimized

by providing a feedback signal that has a direct path

from the output to the main summing PWM comparator.

The integrated feedback signal is also summed into the

PWM comparator, with the gain weighted so that the

integrated signal has only enough gain to correct the

DC inaccuracies. The integrator’s response time is

determined by the time constant set by the capacitor

placed on the CC pin. The time constant should not be

so fast that the integrator responds to the normal V

OUT

ripple or too slow to negate the integrator’s effect. A

470pF to 1500pF CC capacitor is sufficient for 200kHz

to 300kHz frequencies.

Figure 5 shows the output voltage response to a 0A to

3A load transient with and without the integrator. With

the integrator, the output voltage returns to within 0.1%

of its no-load value with only a small AC excursion.

Without the integrator, the typical load-transient

response with the AC and DC output voltage changes.

Asymmetrical clamping at the integrator output pre-

vents worsening of load transients during pulse-

skipping mode.

Internal Digital Soft-Start Circuit

Soft-start allows a gradual increase of the internal cur-

rent-limit level at start-up to reduce input surge cur-

rents. The SMPS contains an internal digital soft-start

circuit controlled by a counter, a digital-to-analog con-

verter (DAC), and a current-limit comparator. In shut-

down or standby mode, the soft-start counter is reset to

zero. When the SMPS is enabled, its counter starts

counting oscillator pulses, and the DAC begins incre-

menting the comparison voltage applied to the current-

limit comparator. The DAC output increases from 0mV

to 100mV in five equal steps as the count increases to

512 clocks. As a result, the main output capacitor

charges up relatively slowly. The exact time of the out-

put rise depends on output capacitance and load cur-

rent, but it is typically 1ms with a 300kHz oscillator.

Overload and Dropout Operation

Dropout (low input-output differential) operation is

enhanced by stretching the clock pulse width to

increase the maximum duty factor. The algorithm fol-

lows: If the output voltage (V

OUT

) drops out of regula-

tion without the current limit having been reached, the

SMPS skips an off-time period (extending the on-time).

At the end of the cycle, if the output is still out of regula-

tion, the SMPS skips another off-time period. This

action can continue until three off-time periods are

skipped, effectively dividing the clock frequency by as

much as four. This behavior also slightly improves load-

transient response. Dividing the clock frequency by

four raises the maximum duty factor to above 98%. The

typical PWM minimum off-time is 300ns, regardless of

the operating frequency.

Low-Voltage, Precision Step-Down

Controller for Portable CPU Power

16 ______________________________________________________________________________________

Adjustable-Output Feedback

(Dual-Mode FB)

A fixed, preset output voltage of 2.5V and 3.3V is

selected when FB is connected to V

or ground. In

this mode, internal resistors monitor the voltage on

CSL. For voltages other than the fixed-output options,

adjust the output voltage through a resistor divider con-

nected to FB (Figure 2). Calculate the output voltage

with the following formula:

OUT

= V

REF

(1 + R1 / R2)

where V

REF

= 1.1V nominal. Recommended normal val-

ues for R2 range from 5kΩ to 100kΩ. To achieve a 1.1V

nominal output, simply connect FB directly to CSL.

Remote output voltage sensing is not possible in fixed

output mode due to the combined nature of the volt-

age-sense and current-sense inputs (CSL). It is, howev-

er, easy to do in adjustable mode by using the top of

the external resistor divider as the remote sense point.

Low-Noise Operation (PWM Mode)

PWM mode (SKIP = high) minimizes RF and audio

interference in noise-sensitive applications such as hi-fi

multimedia-equipped systems, cellular phones, RF

communicating computers, and electromagnetic pen-

entry systems. See the summary of operating modes in

Table 5. SKIP can be driven from an external logic signal.

PWM mode forces a constant switching frequency,

reducing interference due to switching noise by con-

centrating the emissions at a known frequency outside

the system audio or IF bands. Choose an oscillator fre-

quency for which switching frequency harmonics do

not overlap a sensitive frequency band. If necessary,

synchronize the oscillator to a tight-tolerance external

clock generator. To extend the output voltage-regula-

tion range, constant operating frequency is not main-

tained under overload or dropout conditions (see the

Overload and Dropout Operation section).

PWM mode (SKIP = high) forces two changes on the

PWM controller. First, it disables the minimum-current

comparator, ensuring fixed-frequency operation.

Second, it changes the detection threshold for reverse-

current limit from 0mV to -100mV, allowing the inductor

current to reverse at light loads. This results in fixed-fre-

quency operation and continuous inductor-current flow.

PWM mode eliminates discontinuous-mode inductor

ringing and improves cross-regulation of transformer-

coupled, multiple-output supplies.

In most applications, tie SKIP to GND to minimize qui-

escent supply current. VL supply current with SKIP high

is typically 20mA, depending on external MOSFET gate

capacitance and switching losses.

MAX1636

Low-Voltage, Precision Step-Down

Controller for Portable CPU Power

______________________________________________________________________________________ 17

-50

OUT

(A)

OUT

(mV)

(100μs/div)

CC = REF

OUT

= 3.3V

INTEGRATOR

DEFEATED

-50

OUT

(A)

OUT

(mV)

(100μs/div)

CC = 470pF

OUT

= 3.3V

INTEGRATOR

ACTIVE

Figure 5a. Load-Transient Response with Integrator Active Figure 5b. Load-Transient Response with Integrator Defeated

Low-Voltage, Precision Step-Down

Controller for Portable CPU Power

MAX1636

Design Procedure

The five predesigned standard application circuits

(Figure 1 and Table 1) contain ready-to-use solutions

for common application needs. Use the following

design procedure to optimize these basic schematics

for different voltage or current requirements. But before

beginning a design, firmly establish the following:

• Maximum input (battery) voltage, V

IN(MAX)

. This

value should include the worst-case conditions, such

as no-load operation when a battery charger or AC

adapter is connected but no battery is installed.

IN(MAX)

must not exceed 30V.

• Minimum input (battery) voltage, V

IN(MIN)

. This should

be taken at full load under the lowest battery condi-

tions. If V

IN(MIN)

is less than 4.5V, use an external cir-

cuit to externally hold VL above the VL undervoltage

lockout threshold. If the minimum input-output differ-

ence is less than 1.5V, the filter capacitance required

to maintain good AC load regulation increases (see

Low-Voltage Operation section).

Inductor Value

The exact inductor value is not critical and can be

freely adjusted to make trade-offs between size, cost,

and efficiency. Lower inductor values minimize size

and cost but reduce efficiency due to higher peak-cur-

rent levels. The smallest inductor is achieved by lower-

ing the inductance until the circuit operates at the

border between continuous and discontinuous mode.

Further reducing the inductor value below this

crossover point results in discontinuous-conduction

operation even at full load. This helps lower output filter

capacitance requirements, but efficiency suffers due to

high I

R losses. On the other hand, higher inductor val-

ues mean greater efficiency, but resistive losses due to

extra wire turns eventually exceed the benefit gained

from lower peak-current levels. Also, high inductor val-

ues can affect load-transient response (see the V

SAG

equation in the Low-Voltage Operation section). The

equations in this section are for continuous-conduction

operation.

Three key inductor parameters must be specified:

inductance value (L), peak current (I

PEAK

), and DC

resistance (R

). The following equation includes a

constant, LIR, which is the ratio of inductor peak-to-

peak AC current to DC load current. A higher LIR value

allows smaller inductance but results in higher losses

and higher ripple. A good compromise between size

and losses is a 30% ripple-current to load-current ratio

(LIR = 0.3), which corresponds to a peak inductor cur-

rent 1.15 times higher than the DC load current.

L = V

OUT

IN(MAX)

- V

OUT

) / (V

IN(MIN)

x f x I

OUT

x LIR)

where f = switching frequency, normally 200kHz or

300kHz, and I

OUT

= maximum DC load current. The

peak current can be calculated by:

PEAK

= I

LOAD

+ [V

OUT

IN(MAX)

- V

OUT

) / (2 x f x L x V

IN(MAX)

)]

The inductor's DC resistance should be low enough

that R

x I

PEAK

< 100mV, as it is a key parameter for

efficiency performance. If a standard, off-the-shelf

inductor is not available, choose a core with an LI

rat-

ing greater than L x I

PEAK

and wind it with the largest

diameter wire that fits the winding area. For 300kHz

applications, ferrite-core material is strongly preferred;

for 200kHz applications, Kool-Mu

(aluminum alloy) or

even powdered iron is acceptable. If light-load efficien-

cy is unimportant (in desktop PC applications, for

example), then low-permeability iron-powder cores may

be acceptable, even at 300kHz. For high-current appli-

cations, shielded-core geometries, such as toroidal or

pot core, help keep noise, EMI, and switching-wave-

form jitter low.

Current-Sense Resistor Value

The current-sense resistor value is calculated accord-

ing to the worst-case, low-current-limit threshold volt-

age (from the Electrical Characteristics table) and the

peak inductor current:

SENSE

= 80mV / I

PEAK

Use I

PEAK

from the second equation in the Inductor

Value section. Use the calculated value of R

SENSE

size the MOSFET switches and specify inductor satura-

tion-current ratings according to the worst-case high-

current-limit threshold voltage:

PEAK

= 120mV / R

SENSE

Low-inductance resistors, such as surface-mount metal

film, are recommended.

Input Capacitor Value

Connect low-ESR bulk capacitors directly to the drain

on the high-side MOSFET. The bulk input filter capaci-

tor is usually selected according to input ripple current

requirements and voltage rating, rather than capacitor

value. Electrolytic capacitors with low enough equiva-

lent series resistance (ESR) to meet the ripple-current

requirement invariably have sufficient capacitance val-

ues. Aluminum electrolytic capacitors, such as Sanyo

OS-CON or Nichicon PL, are superior to tantalum

types, which risk power-up surge-current failure, espe-

cially when connecting to robust AC adapters or low-

impedance batteries. RMS input ripple current (I

RMS

) is

Low-Voltage, Precision Step-Down

Controller for Portable CPU Power

18 ______________________________________________________________________________________

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