LT1940/LT1940L
4
1940fa
Current Limit vs Duty Cycle
V
OUT
vs Temperature
Frequency Foldback
I
RUN/SS
vs Temperature
TYPICAL PERFOR A CE CHARACTERISTICS
UW
DUTY CYCLE (%)
0
CURRENT LIMIT (A)
TYPICAL
80
1940 G08
20
40
60
100
3.0
2.5
2.0
1.5
1.0
0.5
0
MINIMUM
–50
–25
0 25 50 75 100 125
TEMPERATURE (°C)
V
OUT
(V)
1940 G09
3.40
3.35
3.30
3.25
3.20
CHANNEL 1, FIGURE 1, V
IN
= 12V
SWITCH CURRENT (A)
0
BOOST CURRENT (mA)
20
30
2.0
1940 G07
10
0
0.5
1.0
1.5
40
Frequency vs Temperature
Boost Pin Current
TEMPERATURE (°C)
–50
FREQUENCY (MHz)
1.3
1.2
1.1
1.0
0.9
–25 0 25 50
1940 G10
75 100 125
FEEDBACK VOLTAGE (V)
SWITCHING FREQUENCY (MHz)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1940 G11
0
0.2
0.4 0.6 0.8 1.0 1.2
TEMPERATURE (°C)
–50
0
RUN/SS CURRENT (µA)
0.5
1.0
1.5
2.0
3.0
–25
02550
1940 G12
75 100 125
2.5
Maximum Load Current,
V
OUT
= 1.8V
Switch V
CESAT
Maximum Load Current,
V
OUT
= 3.3V
SW CURRENT (A)
0
SWITCH VOLTAGE (mV)
200
300
2.0
1940 G06
100
0
0.5
1.0
1.5
400
T
A
= 25°C
INPUT VOLTAGE (V)*
0
LOAD CURRENT (A)
1.4
1.6
12 14
1940 G04
1.2
1.0
842
6
10
16
1.8
L = 2.2µH
L = 1.5µH
L = 1µH
INPUT VOLTAGE (V)*
0
LOAD CURRENT (A)
1.4
1.6
20
1940 G05
1.2
1.0
5
10
15
25
1.8
L = 4.7µH
L = 3.3µH
L = 2.2µH
SLOPE COMPENSATION REQUIRES
L > 2.2µH FOR V
IN
< 7 WITH V
OUT
= 3.3V
*Maximum V
IN
is 7V for LT1940L.
LT1940/LT1940L
5
1940fa
UU
U
PI FU CTIO S
BOOST1, BOOST2 (Pins 1, 8): The BOOST pins are used
to provide drive voltages, higher than the input voltage, to
the internal bipolar NPN power switches.Tie through a
diode from V
OUT
or from V
IN
.
SW1, SW2 (Pins 2, 7): The SW pins are the outputs of the
internal power switches. Connect these pins to the induc-
tors, catch diodes and boost capacitors.
V
IN
(Pins 3, 4, 5, 6): The V
IN
pins supply current to the
LT1940’s internal regulator and to the internal power
switches. These pins must be tied to the same source, and
must be locally bypassed.
FB1, FB2 (Pins 9, 16): The LT1940 regulates each feed-
back pin to 1.25V. Connect the feedback resistor divider
taps to these pins.
V
C1
,
V
C2
(Pins 10, 15): The V
C
pins are the outputs of the
internal error amps. The voltages on these pins control the
peak switch currents. These pins are normally used to
compensate the control loops, but can also be used to
override the loops. Pull these pins to ground with an open
drain to shut down each switching regulator.
PG1, PG2 (Pins 11, 14): The Power Good pins are the
open collector outputs of an internal comparator. PG
remains low until the FB pin is within 10% of the final
regulation voltage. As well as indicating output regulation,
the PG pins can be used to sequence the two switching
regulators. These pins can be left unconnected. The PG
outputs are valid when V
IN
is greater than 2.4V and either
of the RUN/SS pins is high. The PG comparators are
disabled in shutdown.
RUN/SS1, RUN/SS2 (Pins 12, 13): The RUN/SS pins are
use to shut down the individual switching regulators and
the internal bias circuits. They also provide a soft-start
function. To shut down either regulator, pull the RUN/SS
pin to ground with an open drain or collector. Tie a
capacitor from these pins to ground to limit switch current
during start-up. If neither feature is used, leave these pins
unconnected.
GND (Pin 17): The Exposed Pad of the package provides
both electrical contact to ground and good thermal con-
tact to the printed circuit board. The Exposed Pad must be
soldered to the circuit board for proper operation.
RUN/SS Thresholds vs
Temperature
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
RUNN/SS THRESHOLDS (V)
TEMPERATURE (°C)
–50 25 75
1940 G13
–25 0
50 100 125
TO SWITCH
TO RUN
LOAD CURRENT (mA)
1
MINIMUM INPUT VOLTAGE (V)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
10 100 1000
1940 G14
V
IN
TO START
BOOST DIODE
TIED TO OUTPUT
BOOST DIODE
TIED TO INPUT
V
IN
TO RUN
T
A
= 25°C
D
BOOST
= BAT54
LOAD CURRENT (mA)
1
MINIMUM INPUT VOLTAGE (V)
7.5
7.0
6.5
6.0
5.5
5.0
4.5
10 100 1000
1940 G14
V
IN
TO START
BOOST DIODE
TIED TO OUTPUT
V
IN
TO RUN
T
A
= 25°C
D
BOOST
= BAT54
BOOST DIODE
TIED TO INPUT
Minimum Input Voltage,
V
OUT
= 3.3V
Minimum Input Voltage,
V
OUT
= 5V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
LT1940/LT1940L
6
1940fa
The LT1940 is a dual, constant frequency, current mode
buck regulator with internal 2A power switches. The two
regulators share common circuitry including input source,
voltage reference and oscillator, but are otherwise inde-
pendent. This section describes the operation of the
LT1940; refer to the Block Diagram.
If the RUN/SS (run/soft-start) pins are both tied to ground,
the LT1940 is shut down and draws 30µA from the input
source tied to V
IN
. Internal 2µA current sources charge
external soft-start capacitors, generating voltage ramps at
BLOCK DIAGRA
W
+
+
+
+
R
SQ
SLAVE
OSC
INT REG
AND REF
MASTER
OSC
RUN/SS2
RUN/SS1
2µA
2µA
CLK1
CLK2
V
IN
1.25V
125mV
I
LIMIT
CLAMP
RUN/SS
PG
C
C
C
F
R
C
GND
ERROR
AMP
SLOPE
V
C
0.75V
0.5V
CLK
R1
C1
C
IN
SW
FB
BOOST
V
IN
IN
D2
C3
L1
D1
C1
R2
OUT
1940 F02
these pins. If either RUN/SS pin exceeds 0.6V, the internal
bias circuits turn on, including the internal regulator,
1.25V reference and 1.1MHz master oscillator. In this
state, the LT1940 draws 3.5mA from V
IN
, whether one or
both RUN/SS pins are high. Neither switching regulator
will begin to operate until its RUN/SS pin reaches ~0.8V.
The master oscillator generates two clock signals of
opposite phase.
The two switchers are current mode step-down regula-
tors. This means that instead of directly modulating the
Figure 2. Block Diagram of the LT1940 with Associated External Components (One of Two Switching Regulators Shown)

LT1940EFE#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators Dual 1.4A Step-dn DC/DC Converter
Lifecycle:
New from this manufacturer.
Delivery:
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