17
PCB Layout Considerations
1. Place the power MOSFET’s as close to the controller as
possible. Failure to do so will cause large amounts of
ringing due to the parasitic inductance of the copper
trace. Additionally, the parasitic capacitance of the trace
will weaken the effective gate drive. High frequency
switching noise may also couple to other control lines.
2. Always place the by-pass capacitors (0.1µF and 1µF) as
close to the EL7571 as possible. Long lead lengths will
lessen the effectiveness.
3. Separate the power ground (input capacitor ground and
ground connections of the Schottky diode and the power
MOSFET’s) and signal grounds (ground pins of the by-
pass capacitors and ground terminals of the EL7571).
This will isolate the highly noisy switching ground from the
very sensitive signal ground.
4. Connect the power and signal grounds at the output
capacitors. Output capacitor ground is the quietest point
in the converter and should be used as the reference
ground.
5. The power MOSFET’s output inductor and Schottky
diode should be grouped together to contain high
switching noise in the smallest area.
6. Current sense traces running from pin 11 and pin 12 to
the current sense resistor should run parallel and close to
each other and be Kelvin connected (no high current
flow). In high current applications performance can be
improved by connecting low Pass filter (typical values
4.7Ω, 0.1µF) between the sense resistor and the IC
inputs.
Layout Example
To demonstrate the points discussed above, below shows
two reference layouts - a synchronous 5V only VRM layout
and a synchronous 5V only PC board layout. Both layouts
can be modified to any application circuit configuration
shown on this data sheet. Gerber files of the layouts are
available from the factory.
Top Layer Silkscreen
Bottom Layer Silkscreen
EL7571