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EL7571CMZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P19
7
Applications Information
Circuit Description
General
The EL7571 is a fixed frequency, current mode, pulse width
modulated (PWM) controller with an integrated high
precision reference and a 5 bit Digital-to-Analog Converter
(DAC). The device incorporates all the active circuitry
required to implement a synchronous step down (buck)
converter which conforms to the Intel Pentium® II VRM
specification. Complementary switching outputs are
provided to drive dual NMOS power FET’s in either
synchronous or non-synchronous configurations, enabling
the user to realize a variety of high efficiency and low cost
converters.
Reference
A precision, temperature compensated band gap reference
forms the basis of the EL7571. The reference is trimmed
during manufacturing and provides 1% set point accuracy for
the overall regulator. AC rejection of the reference is
optimized using an external bypass capacitor C
REF
.
Main Loop
A current mode PWM control loop is implemented in the
EL7571 (see block diagram). This configuration employs
dual feedback loops which provide both output voltage and
current feedback to the controller. The resulting system
offers several advantages over tradititional voltage control
systems, including simpler loop design, pulse by pulse
current limiting, rapid response to line variaion and good
load step response. Current feedback is performed by
sensing voltage across an external shunt resistor. Selection
of the shunt resistance value sets the level of current
feedback and thereby the load regulation and current limit
levels. Consequently, operation over a wide range of output
currents is possible. The reference output is fed to a 5 bit
DAC with step weighing conforming to the Intel VRM
Specification. Each DAC input includes an internal current
pull up which directly interfaces to the VID output of a
Pentium® II class microprocessor. The heart of the controller
is a triple-input direct summing differential comparator, which
sums voltage feedback, current feedback and compensating
ramp signals together. The relative gains of the comparator
input stages are weighed. The ratio of voltage feedback to
current feedback to compensating ramp defines the load
regulation and open loop voltage gain for the system,
respectively. The compensating ramp is required to maintain
large system signal system stability for PWM duty cycles
greater than 50%. Compensation ramp amplitude is user
adjustable and is set with a single external capacitor
(C
SLOPE
). The ramp voltage is ground referenced and is
reset to ground whenever the high side drive signal is low. In
operation, the DAC output voltage is compared to the
regulator output, which has been internally attenuated. The
resulting error voltage is compared with the compensating
ramp and current feedback voltage. PWM duty cycle is
adjusted by the comparator output such that the combined
comparator input sums to zero. A weighted comparator
scheme enhances system operation over traditional voltage
error amplifier loops by providing cycle-by-cycle adjustment
of the PWM output voltage, eliminating the need for error
amplifier compensation. The dominant pole in the loop is
defined by the output capacitance and equivalent load
resistance, the effect of the output inductor having been
canceled due to the current feedback. An output enable
(OUTEN) input allows the regulator output to be disabled by
an external logic control signal.
Auxiliary Comparators
The current feedback signal is monitored by two additional
comparators which set the operating limits for the main
inductor current. An over current comparator terminates the
PWM cycle independently of the main summing comparator
output whenever the voltage across the sense resistor
exceeds 154mV. For a 7.5mΩ resistor this corresponds to a
nominal 20A current limit. Since output current is
continuously monitored, cycle-by-cycle current limiting
results. A second comparator senses inductor current
reverse flow. The low side drive signal is terminated when
the sense resistor voltage is less than -5mV, corresponding
to a nominal reverse current of -0.67A, for a 7.5mΩ sense
resistor. Additionally, under fault conditions, with the
regulator output over-voltage, inductor current is prevented
from ramping to a high level in the reverse direction. This
prevents the parasitic boost action of the local power supply
when the fault is removed and potential damage to circuitry
connected to the local supply.
Oscillator
A system clock is generated by an internal relaxation
oscillator. Operating frequency is simple to adjust using a
single external capacitor C
OSC
. The ratio of charge to
discharge current in the oscillator is well defined and sets the
maximum duty cycle for the system at around 96%.
Soft-start
During start-up, potentially large currents can flow into the
regulator output capacitors due to the fast rate of change of
output voltage caused during start-up, although peak inrush
current will be limited by the over current comparator.
However an additionally internal switch capacitor soft-start
circuit controls the rate of change of output voltage during
start-up by overriding the voltage feedback input of the main
summing comparator, limiting the start-up ramp to around
1ms under typical operating conditions. The soft-start ramp
is reset whenever the output enable (OUTEN) is reset or
whenever the controller supply falls below 3.5V.
Watchdog
A system watchdog monitors the condition of the controller
supply and the integrity of the generated output voltage.
EL7571
8
Modern logic level power FET’s rapidly increase in resistivity
(R
DS-ON
) as their gate drive is reduced below 5V. To prevent
thermal damage to the power FET’s under load, with a
reduced supply voltage, the system watchdog monitors the
controller supply (V
IN
) and disables both PWM outputs
(HSD, LSD) when the supply voltage drops below 3.5V.
When the supply voltage is increased above 4V the
watchdog initiates a soft-start ramp and enables PWM
operation. The difference between enable and disable
thresholds introduces hysteresis into the circuit operation,
preventing start-up oscillation. In addition, output voltage is
also monitored by the watchdog. As called out by the Intel
Pentium® II VRM specification, the watchdog power good
output (PWRGD) is set low whenever the output voltage
differs from it’s selected value by more than ±13%. PWRGD
is an open drain output. A third watchdog function disables
PWM output switching during over-voltage fault conditions,
displaying both external FET drives, whenever the output
voltage is greater than 13% of its selected value, thereby
anticipating reverse inductor current ramping and
conforming to the VRM over-voltage specification, which
requires the regulator output to be disabled during fault
conditions. Switching is enabled after the fault condition is
removed.
Output Drivers
Complementary control signals developed by the PWM
control loop are fed to dual NMOS power FET drivers via a
level shift circuit. Each driver is capable of delivering nominal
peak output currents of 2A at 12V. To prevent shoot-through
in the external FET’s, each driver is disabled until the gate
voltage of the complementary power FET has fallen to less
than 1V. Supply connections for both drivers are
independent, allowing the controller to be configured with a
boot-strapped high side drive. Employing this technique a
single supply voltage may be used for both power FET’s and
controller. Alternatively, the application may be simplified
using dual supply rails with the power FET’s connected to a
secondary supply voltage below the controller’s, typically
12V and 5V. For applications where efficiency is less
important than cost, applications can be further simplified by
replacing the low side power FET with a Schottky diode,
resulting in non-synchronous operation.
Applications Information
The EL7571 is designed to meet the Intel 5 bit VRM
specification. Refer to the VID decode table for the controller
output voltage range.
The EL7571 may be used in a number converter topologies.
The trade-off between efficiency, cost, circuit complexity, line
input noise, transient response and availability of input
supply voltages will determine which converter topology is
suitable for a given application. The following table lists some
of the differences between the various configurations:
Circuit schematics and Bills of Material (BOMs) for the
various topologies are provided at the end of this data sheet.
If your application requirements differ from the included
samples, the following design guide lines should be used to
select the key component values. Refer to the front page
connection diagram for component locations.
Output Inductor, L
1
Two key converter requirements are used to determine
inductor value:
•I
MIN
- minimum output current; the current level at which
the converter enters the discontinuous mode of operation
(refer to Elantec application note #18 for a detailed
discussion of discontinuous mode)
•I
MAX
- maximum output current
Although many factors influence the choice of the inductor
value, including efficiency, transient response and ripple
current, one practical way of sizing the inductor is to select a
value which maintains continuous mode operation, i.e.
inductor current positive for all conditions. This is desirable to
optimize load regulation and light load transient response.
When the minimum inductor ripple current just reaches zero
and with the mean ripple current set to I
MIN
, peak inductor
ripple current is twice I
MAX
, independent of duty cycle. The
minimum inductor value is given by:
Converter Topologies
TOPOLOGY DIAGRAM EFFICIENCY COST COMPLEXITY INPUT NOISE
TRANSIENT
RESPONSE
5V only Non-synchronous figure 1 92% low low high good
5V only Synchronous figure 2 95% higher higher high good
5V &12V Non-synchronous figure 3 92% lowest lowest high good
5V & 12V Synchronous figure 4 95% high high high good
12V only Synchronous Connection Diagram 92% highest highest high best
L
1MIN
V(
IN
V
OUT
) T
ON
×–
1
PEAK
--------------------------------------------------------
V(
IN
V
OUT
) V
OUT
×–
V
IN
F
SW
2I
MIN
×××
------------------------------------------------------------==
EL7571
9
where:
I
PEAK
= peak ripple current
T
ON
= top switch on time
V
IN
= input voltage
F
SW
= switching frequency
V
OUT
= output voltage
I
MIN
= minimum load
Since inductance value tends to decrease with current,
ripple current will generally be greater than 21
MIN
at higher
output current.
Once the minimum output inductance is determined, an off
the shelf inductor with current rating greater than the
maximum DC output required can be selected. Pulse
Engineering and Coil Craft are two manufactures of high
current inductors. For converter designers who want to
design their own high current inductors, for experimental
purposes or to further reduce costs, we recommend the
Micrometals Powered Iron Cores data sheet and
applications note as a good reference and starting point.
Current Sense Resistor, R
1
Inductor current is monitored indirectly via a low value
resistor R
1
. The voltage developed across the current sense
resistor is used to set the maximum operating current, the
current reversal threshold and the system load regulation. To
ensure reliable system operation it is important to sense the
actual voltage drop across the resistor. Accordingly a four
wire Kelvin connection should be made to the controller
current sense inputs. There are two criteria for selecting the
resistor value and type. Firstly, the minimum value is limited
by the maximum output current. The EL7571 current limit
capacitor has a typical threshold of 154mV, 125mV
minimum. When the voltage across the sense resistor
exceeds this threshold, the conduction cycle of the top
switch terminates immediately, providing pulse by pulse
current limiting. A resistor value must be selected which
guarantees operation under maximum load. That is:
where:
V
OCMIN
= minimum over current voltage threshold
I
MAX
= maximum output current
Secondly, since the load current passes directly through the
sense resistor, its power rating must be sufficient to handle
the power dissipated during maximum load (current limit)
conditions. Thus:
where:
P
D
= power dissipated in current sense resistor
P
D
must be less than the power rating of the current sense
resistor. High current applications may require parallel sense
resistors to dissipate sufficient power. Current Sense
Resistor Table below lists some popular current sense
resistors: the WLS-2512 series of Power Metal Strip
Resistors from Dale Electronics, OARS series Iron Alloy
resistor from IRC, and Copper Magnanin (CuNi) wire resistor
from Mills Resistors. Mother board copper trace is not
recommended because of its high temperature coefficient
and low power dissipation. The trade-off between the
different types of resistors are cost, space, packaging and
performance. Although Power Metal Strip Resistors are
relatively expensive, they are available in surface mount
packaging with tighter tolerances. Consequently, less board
space is used to achieve a more accurate current sense.
Alternatively, Magnanin copper wire has looser tolerance
and higher parasitic inductance. This results in a less current
sense but at a much lower cost. Metal track on the PCB can
also be used as current sense resistor. The trade-offs are
±30% tolerance and ±4000 ppm temperature coefficient.
Ultimately, the selection of the type of current sense element
must be made on an application by application basis.
R
1
V
OCMIN
1
MAX
-----------------------=
P
D
1
OUTMAX
2
R
1
×=
Bill of Materials
MANUFACTURER PART NO. TOLERANCE
TEMPERATURE
COEFFICIENT POWER RATING PHONE NO. FAX NO.
Dale WSL 2512 ±1% ±75ppm 1W 402-563-6506 402-563-6418
IRC OARS Series ±5% ±20ppm 1W - 5W 800-472-6467 800-472-3282
Mills Resistor MRS1367-TBA ±10% ±20ppm 1.2W 916-422-5461 906-422-1409
PCB Trace Resistor ±30% ±4000ppm 50A/in (1oz Cu)
EL7571
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EL7571CMZ

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IC REG CTRLR INTEL 2OUT 20SO
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