A6812SLWTR-T

Description
The A6812 device combines a 20-bit CMOS shift register,
ac com pa ny ing data latches and control cir cuit ry with bipolar
sourcing out puts ,and PNP active pull-downs. De signed
pri mar ily to drive vacuum-flu o res cent displays, the 60 V and
-40 mA output ratings also allow these devices to be used in
many other peripheral power driver applications. The A6812
features an increased data-input rate (com pared with the older
UCN/UCQ5812-F) and a controlled output slew rate.
The CMOS shift register and latches allow direct interfacing
with mi cro pro ces sor-based systems. With a 3.3 or 5 V logic
supply, they operate to at least 10 MHz.
A CMOS serial data output permits cascaded con nec tions in
ap pli ca tions re quir ing additional drive lines. Similar devices
are avail able as the A6810 (10-bit) and A6818 (32-bit).
The A6812 output source drivers are NPN Dar ling tons,
capable of sourcing up to 40 mA. The controlled output slew
rate reduces elec tro mag net ic noise, which is an important
consideration in systems that include telecommunications
and/or microprocessors and to meet government emis sions
26182.126F
Features and Benefits
Controlled output slew rate
High-speed data storage
60 V minimum output break down
High data-input rate
PNP active pull-downs
Low output-saturation voltages
Low-power CMOS logic and latches
Improved replacements for TL5812x, UCN5812x, and
UCQ5812x
DABiC-IV 20-Bit Serial-Input
Latched Source Driver
Continued on the next page…
Package:
Functional Block Diagram
Not to scale
A6812
28-pin PLCC
(EP package)
28-pin SOICW
(Package LW)
DABiC-IV 20-Bit Serial-Input
Latched Source Driver
A6812
2
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Selection Guide
Part Number Pb-free Packing Package
Ambient Temperature, T
A
(°C)
A6812EEPTR*
800 pieces/13-in. reel PLCC
–40 to 85A6812EEPTR-T* Yes
A6812ELWTR-T Yes 1000 pieces/13-in. reel SOIC-W
A6812KLWTR-T* Yes 1000 pieces/13-in. reel SOIC-W –40 to 125
A6812SEPTR*
800 pieces/13-in. reel PLCC
–20 to 85A6812SEPTR-T Yes
A6812SLWTR-T* Yes 1000 pieces/13-in. reel SOIC-W
*Variant is in production but has been determined to be NOT FOR NEW DESIGN. This classification indicates that sale of the variant is
currently restricted to existing customer applications. The variant should not be purchased for new design applications because obsolescence
in the near future is probable. Samples are no longer available. Status change: May 4, 2009.
regulations. For inter-digit blanking, all output drivers can be
dis abled and all sink drivers turned on with a BLANK ING input
high. The PNP active pull-downs sink at least 2.5 mA.
Three temperature ranges are available for optimum performance in
commercial (suffix S-), industrial (suffix E-), or automotive (suffix
K-) ap pli ca tions. Pack age styles are provided for surface-mount
SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix
-EP). Copper lead frames, low logic-power dis si pa tion, and low
output-saturation voltages allow these drivers to source 25 mA
from all outputs continuously to more than 43°C (suffix -LW) or
61°C (suffix -EP).
Each package is available in a lead (Pb) free version, with 100%
matte tin leadframe plating.
Description (continued)
DABiC-IV 20-Bit Serial-Input
Latched Source Driver
A6812
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Absolute Maximum Ratings*
Characteristic Symbol Notes Rating Units
Logic Supply Voltage V
DD
7V
Driver Supply Voltage V
BB
60 V
Input Voltage Range V
IN
–0.3 to V
DD
+ 0.3 V
Continuous Output Current Range I
OUT
–40 to 15 mA
Operating Ambient Temperature T
A
Range E –40 to 85 ºC
Range K –40 to 125 ºC
Range S –20 to 85 ºC
Maximum Junction Temperature T
J
(max) 150 ºC
Storage Temperature T
stg
–65 to 125 ºC
*Caution: These CMOS devices have input static protection (Class 2) but are still susceptible to damage if exposed to extremely high
static electrical charges.
Thermal Characteristics
Characteristic Symbol Test Conditions* Value Units
Package Thermal Resistance
R
θJA
Package EP, 1-layer PCB with solder limited to mounting pads 68 ºC/W
Package LW, 1-layer PCB with solder limited to mounting pads 80 ºC/W
*Additional thermal information available on the Allegro website
50 75 100 125 150
2.5
0.5
0
ALLOWABLE PACKAGE POWER DISSIPATION IN WATTS
AMBIENT TEMPERATURE IN oo
oo
C
2.0
1.5
1.0
25
Dwg. GP-024-2
SUFFIX 'EP', R = 68
o
C/W
QJA
o
SUFFIX 'LW', R
= 80
C/
W
Q
JA

A6812SLWTR-T

Mfr. #:
Manufacturer:
Description:
IC SOURCE DRVR 20BIT SER 28SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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