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M27V322-100B1

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23
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List of figures M27V322
4/23
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. DIP connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Programming flowchart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 4. AC testing input output waveform. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 5. AC testing load circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Read mode AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 7. Margin mode AC waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 8. Programming and Verify modes AC waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 9. FDIP42W - 42 pin Ceramic Frit-seal DIP, with window (0.315" × 0.630"),
package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 10. PDIP42 - 42 pin Plastic DIP, 600 mils width, package outline . . . . . . . . . . . . . . . . . . . . . . 19
Figure 11. SDIP42 - 42 pin Shrink Plastic DIP, 600 mils width, package outline. . . . . . . . . . . . . . . . . 20
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M27V322 Summary description
5/23
1 Summary description
The M27V322 is a 32 Mbit EPROM offered in the UV range (ultra violet erase) and OTP
range. It is ideally suited for microprocessor systems requiring large data or program
storage. It is organised as 2 MWords of 16 bit. The pin-out is compatible with a 32 Mbit Mask
ROM.
The FDIP42W (window ceramic frit-seal package) has a transparent lid which allows the
user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be
written rapidly to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not
required, the M27V322 is offered in PDIP42 and SDIP42 packages.
In order to meet environmental requirements, ST offers the M27V322 in ECOPACK®
packages.
ECOPACK packages are Lead-free. The category of second Level Interconnect is marked
on the package and on the inner box label, in compliance with JEDEC Standard JESD97.
The maximum ratings related to soldering conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
Figure 1. Logic diagram
Table 1. Signal names
A0-A20 Address Inputs
Q0-Q15 Data Outputs
E Chip Enable
G
V
PP
Output Enable / Program Supply
V
CC
Supply Voltage
V
SS
Ground
AI03050
21
A0-A20
GV
PP
Q0-Q15
V
CC
M27V322
E
V
SS
16
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Summary description M27V322
6/23
Figure 2. DIP connections
GV
PP
Q0
Q8
A3
A0
E
V
SS
A2
A1
A13
V
SS
A14
A15
Q7
A12
A16
A20
Q15
Q5Q2
Q3
V
CC
Q11
Q4
Q14
A9
A8A17
A4
A18 A19
A7
AI03051
M27V322
8
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
20
19
18
17
Q1
Q9
A6
A5
Q6
Q13
42
39
38
37
36
35
34
33
A11
A10
Q10
21
Q12
40
41
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P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P23

M27V322-100B1

Mfr. #:
Buy M27V322-100B1
Manufacturer:
STMicroelectronics
Description:
IC EPROM 32M PARALLEL 42DIP
Lifecycle:
New from this manufacturer.
Delivery:
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