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Device operation M27V322
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2.4 System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the supplies to the devices. The supply current ICC has three segments of
importance to the system designer: the standby current, the active current and the transient
peaks that are produced by the falling and rising edges of E
. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device outputs.
The associated transient voltage peaks can be suppressed by complying with the two line
output control and by properly selected decoupling capacitors. It is recommended that a
0.1µF ceramic capacitor is used on every device between V
CC
and V
SS
. This should be a
high frequency type of low inherent inductance and should be placed as close as possible to
the device. In addition, a 4.7µF electrolytic capacitor should be used between V
CC
and V
SS
for every eight devices. This capacitor should be mounted near the power supply connection
point. The purpose of this capacitor is to overcome the voltage drop caused by the inductive
effects of PCB traces.
2.5 Programming
When delivered (and after each erasure for UV EPROM), all bits of the M27V322 are in the
"1" state. Data is introduced by selectively programming "0"s into the desired bit locations.
Although only "0"s will be programmed, both "1"s and "0"s can be present in the data word.
The only way to change a "0" to a "1" is by die exposition to ultraviolet light (UV EPROM).
The M27V322 is in the programming mode when V
PP
input is at 12.V, GV
PP
is at V
IH
and E
is pulsed to V
IL
. The data to be programmed is applied to 16 bits in parallel to the data
output pins. The levels required for the address and data inputs are TTL. V
CC
is specified to
be 6.25V ± 0.25V.
2.6 PRESTO III programming algorithm
The PRESTO III Programming Algorithm allows the whole array to be programed with a
guaranteed margin in a typical time of 100 seconds. Programming with PRESTO III consists
of applying a sequence of 50µs program pulses to each word until a correct verify occurs
(see Figure 3). During programing and verify operation a MARGIN MODE circuit must be
activated to guarantee that each cell is programed with enough margin. No overprogram
pulse is applied since the verify in MARGIN MODE provides the necessary margin to each
programmed cell.
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