AD625
AD625A/J/S AD625B/K AD625C
Model Min Typ Max Min Typ Max Min Typ Max Unit
NOISE
Voltage Noise, 1 kHz
R.T.I. 4 4 4 nV/Hz
R.T.O. 75 75 75 nV/Hz
R.T.I., 0.1 Hz to 10 Hz
G = 1 10 10 10 µV p-p
G = 10 1.0 1.0 1.0 µV p-p
G = 100 0.3 0.3 0.3 µV p-p
G = 1000 0.2 0.2 0.2 µV p-p
Current Noise
0.1 Hz to 10 Hz 60 60 60 pA p-p
SENSE INPUT
R
IN
10 10 10 k
I
IN
30 30 30 µA
Voltage Range ±10 ± 10 ±10 V
Gain to Output 1 ± 0.01 1 ± 0.01 1 ± 0.01 %
REFERENCE INPUT
R
IN
20 20 20 k
I
IN
30 30 30 µA
Voltage Range ±10 ± 10 ±10 V
Gain to Output 1 ± 0.01 1 ± 0.01 1 ± 0.01 %
TEMPERATURE RANGE
Specified Performance
J/K Grades 0 +70 0 +70 °C
A/B/C Grades 40 +85 40 +85 40 +85 °C
S Grade 55 +125 °C
Storage 65 +150 65 +150 65 +150 °C
POWER SUPPLY
Power Supply Range ±6 to ±18 ±6 to ± 18 ±6 to ± 18 V
Quiescent Current 3.5 5 3.5 5 3.5 5 mA
NOTES
1
Gain Error and Gain TC are for the AD625 only. Resistor Network errors will add to the specified errors.
2
V
DL
is the maximum differential input voltage at G = 1 for specified nonlinearity. V
DL
at other gains = 10 V/G. V
D
= actual differential input voltage.
Example: G = 10, V
D
= 0.50; V
CM
= 12 V (10/2 × 0.50 V) = 9.5 V.
Specifications subject to change without notice.
All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are
used to calculate outgoing quality levels.
REV. D
–3–
AD625
REV. D–4–
PIN CONNECTIONS
Ceramic DIP (D) and Plastic DIP (N) Packages
TOP VIEW
(Not to Scale)
NC = NO CONNECT
+INPUT INPUT
AD625
+GAIN SENSE GAIN SENSE
RTI NULL RTO NULL
RTI NULL RTO NULL
+GAIN DRIVE
GAIN DRIVE
NC SENSE
REFERENCE V
OUT
V
S
+V
S
10k 10k+V
S
V
S
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Leadless Chip Carrier (E) Package
20 19123
18
14
15
16
17
4
5
6
7
8
910111213
TOP VIEW
(Not to Scale)
AD625
RTI NULL
RTI NULL
NC
+GAIN DRIVE
NC
RTO NULL
RTO NULL
NC
GAIN NULL
SENSE
NC = NO CONNECT
+INPUT
REFERENCE
V
S
NC
+V
S
NC
+GAIN SENSE
GAIN SENSE
V
OUT
INPUT
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
Internal Power Dissipation . . . . . . . . . . . . . . . . . . . . . . 450 mW
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
S
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . ±V
S
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (D, E) . . . . . . . . 65°C to +150°C
Storage Temperature Range (N) . . . . . . . . . . 65°C to +125°C
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD625 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model Temperature Range Package Description Package Option
AD625AD 40°C to +85°C 16-Lead Ceramic DIP D-16
AD625BD 40°C to +85°C 16-Lead Ceramic DIP D-16
AD625BD/+ 40°C to +85°C 16-Lead Ceramic DIP D-16
AD625CD 40°C to +85°C 16-Lead Ceramic DIP D-16
AD625SD 55°C to +125°C 16-Lead Ceramic DIP D-16
AD625SD/883B 55°C to +125°C 16-Lead Ceramic DIP D-16
AD625SE/883B 55°C to +125°C 20-Terminal Leadless Chip Carrier E-20A
AD625JN 0°C to +70°C 16-Lead Plastic DIP N-16
AD625KN 0°C to +70°C 16-Lead Plastic DIP N-16
AD625ACHIPS 40°C to +85°CDie
AD625SCHIPS 55°C to +125°CDie
5962-87719012A* 55°C to +125°C 20-Terminal Leadless Chip Carrier E-20A
5962-8771901EA* 55°C to +125°C 16-Lead Ceramic DIP D-16
*Standard Military Drawing Available
Operating Temperature Range
AD625J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD625A/B/C . . . . . . . . . . . . . . . . . . . . . . . . 40°C to +85°C
AD625S . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to +125°C
Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
SUPPLY VOLTAGE V
INPUT VOLTAGE RANGE V
20
0
15
10
5
0
5101520
25C
Figure 1. Input Voltage Range vs.
Supply Voltage, G = 1
FREQUENCY Hz
CMRR dM
160
0
10 100 1k 10k 100k 10M
140
120
100
80
60
40
20
0
G = 1000
G = 100
G = 10
G = 1
Figure 4. CMRR vs. Frequency
RTI, Zero to 1 k
Source Imbal-
ance
WARM-UP TIME Minutes
V
OS
FROM FINAL VALUE V
1
0
0
1
2
3
4
5
6
7
1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0
Figure 7. Offset Voltage, RTI, Turn
On Drift
SUPPLY VOLTAGE V
OUTPUT VOLTAGE SWING V
20
0
15
10
5
0
5101520
Figure 2. Output Voltage Swing
vs. Supply Voltage
FREQUENCY Hz
FULL POWER RESPONSE V p-p
30
1k
20
10
0
10k 100k 1M
G = 500
G = 1, 100
G = 1000
G = 100
BANDWIDTH
LIMITED
Figure 5. Large Signal Frequency
Response
FREQUENCY Hz
POWER SUPPLY REJECTION dB
160
10
140
120
100
80
60
40
20
0
100 1k 10k 100k
V
S
= 15V dc+
1V p-p SINEWAVE
G = 500
G = 100
G = 1
Figure 8. Negative PSRR vs.
Frequency
LOAD RESISTANCE
OUTPUT VOLTAGE SWING V p-p
30
10
20
10
0
100 1k 10k
Figure 3. Output Voltage Swing
vs. Load Resistance
FREQUENCY Hz
GAIN
100
1000
100
10
1
1k 10k 100k 1M 10M
Figure 6. Gain vs. Frequency
FREQUENCY Hz
POWER SUPPLY REJECTION dB
160
10
140
120
100
80
60
40
20
0
100 1k 10k 100k
+V
S
= +15V dc+
1V p-p SINEWAVE
G = 500
G = 100
G = 1
Figure 9. Positive PSRR vs.
Frequency
Typical Performance CharacteristicsA
D625
REV. D
–5–

5962-87719012A

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Instrumentation Amplifiers PROGRAMMABLE GAIN IN-AMP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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