AD625
REV. D–8–
THEORY OF OPERATION
The AD625 is a monolithic instrumentation amplifier based on
a modification of the classic three-op-amp approach. Monolithic
construction and laser-wafer-trimming allow the tight matching
and tracking of circuit components. This insures the high level
of performance inherent in this circuit architecture.
A preamp section (Q1–Q4) provides additional gain to A1 and
A2. Feedback from the outputs of A1 and A2 forces the collec-
tor currents of Q1–Q4 to be constant, thereby, impressing the
input voltage across R
G
. This creates a differential voltage at the
outputs of A1 and A2 which is given by the gain (2R
F
/R
G
+ 1)
times the differential portion of the input voltage. The unity
gain subtracter, A3, removes any common-mode signal from the
output voltage yielding a single ended output, V
OUT
, referred to
the potential at the reference pin.
The value of R
G
is the determining factor of the transconduc-
tance of the input preamp stage. As R
G
is reduced for larger
gains the transconductance increases. This has three important
advantages. First, this approach allows the circuit to achieve a
very high open-loop gain of (3 × 10
8
at programmed gains ≥ 500)
thus reducing gain related errors. Second, the gain-bandwidth
product, which is determined by C3, C4, and the input trans-
conductance, increases with gain, thereby, optimizing frequency
response. Third, the input voltage noise is reduced to a value
determined by the collector current of the input transistors
(4 nV/√Hz).
INPUT PROTECTION
Differential input amplifiers frequently encounter input voltages
outside of their linear range of operation. There are two consid-
erations when applying input protection for the AD625; 1) that
continuous input current must be limited to less than 10 mA
and 2) that input voltages must not exceed either supply by
more than one diode drop (approximately 0.6 V @ 25°C).
Under differential overload conditions there is (R
G
+ 100) Ω in
series with two diode drops (approximately 1.2 V) between the
plus and minus inputs, in either direction. With no external protec-
tion and R
G
very small (i.e., 40 Ω), the maximum overload
voltage the AD625 can withstand, continuously, is approximately
±2.5 V. Figure 26a shows the external components necessary to
protect the AD625 under all overload conditions at any gain.
V
B
+
–
GAIN
DRIVE
GAIN
DRIVE
R
F
R
F
R
G
50A50A
C3
C4
A1 A2
10k
10k
50
GAIN
SENSE
GAIN
SENSE
Q1, Q3 Q2, Q4
50
50A50A
10k
10k
–IN
+V
S
–V
+IN
SENSE
V
O
REF
Figure 25. Simplified Circuit of the AD625
The diodes to the supplies are only necessary if input voltages
outside of the range of the supplies are encountered. In higher
gain applications where differential voltages are small, back-to-
back Zener diodes and smaller resistors, as shown in Figure
26b, provides adequate protection. Figure 26c shows low cost
FETs with a maximum ON resistance of 300 Ω configured to offer
input protection with minimal degradation to noise, (5.2 nV/√Hz
compared to normal noise performance of 4 nV/√Hz).
During differential overload conditions, excess current will flow
through the gain sense lines (Pins 2 and 15). This will have no
effect in fixed gain applications. However, if the AD625 is being
used in an SPGA application with a CMOS multiplexer, this
current should be taken into consideration. The current capa-
bilities of the multiplexer may be the limiting factor in allowable
overflow current. The ON resistance of the switch should be
included as part of R
G
when calculating the necessary input
protection resistance.
AD625
+V
S
–V
S
R
F
R
G
R
F
FD333
FD333
FD333
FD333
–IN
+IN
1.4k
1.4k
V
OUT
Figure 26a. Input Protection Circuit
AD625
+V
S
–V
S
R
F
R
G
R
F
FD333
FD333
FD333
–IN
+IN
500
V
OUT
FD333
1N5837A
1N5837A
500
Figure 26b. Input Protection Circuit for G > 5
AD625
+V
S
–V
S
R
F
R
G
R
F
FD333
–IN
+IN
V
OUT
FD333
FD333
FD333
2k
2N5952
2k
2N5952
Figure 26c. Input Protection Circuit
