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LTC1274CSW#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
19
LTC1274/LTC1277
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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The LTC1277 has an additional Nap mode. When NAP
(Pin 7) is tied low, all the power is off except the internal
reference which is still active and provides 2.42V output
voltage to the other circuitry. In this mode the ADC draws
0.9mW instead of 10mW (for minimum power, the logic
inputs must be within 600mV from the supply rails). The
wake-up time from the power shutdown to active state is
620ns. The typical performance graph on the front page of
this data sheet shows that the power will be reduced
greatly by using the Sleep and Nap modes.
Power Shutdown
The LTC1274/LTC1277 provide shutdown features that
will save power when the ADC is in inactive periods. Both
ADCs have a Sleep mode. To power down the ADCs,
SLEEP (Pin 18 in LTC1274 or Pin 6 in LTC1277) needs to
be driver low.
When in Sleep mode, the LTC1274/LTC1277
will not start a conversion even though the CONVST goes
low. The parts draw 1µA. After release from the Sleep
mode, the ADCs need 3ms (4.7µF bypass capacitor on
V
REF
pin) to wake up and a REFRDY signal will go to high
to indicate the ADC is ready to do conversions.
RD = CONVST
BUSY
LTC1274/77 • F16
t
15
t
18
CS = 0
HBEN (LTC1277)
DATA N
DB11 TO DB0
DATA N
DB7 TO DB0
DATA (N – 1)
DB7 TO DB0
DATA (N – 1)
DB11 TO DB0
DATA N
DB11 TO DB8
LTC1274 DATA
LTC1277 DATA
t
5
t
9
t
6
t
10
t
7
(SAMPLE N)
DATA (N + 1)
DB7 TO DB0
DATA N
DB11 TO DB0
DATA (N + 1)
DB11 TO DB8
(SAMPLE N + 1)
DATA (N + 1)
DB11 TO DB0
DATA N
DB11 TO DB0
t
CONV
Figure 16. Slow Memory Mode
RD = CONVST
BUSY
LTC1274/77 • F17
t
15
CS = 0
HBEN (LTC1277)
DATA (N – 1)
DB11 TO DB0
DATA (N – 1)
DB7 TO DB0
DATA (N – 1)
DB11 TO DB8
LTC1274 DATA
LTC1277 DATA
t
5
t
18
t
9
t
10
t
7
(SAMPLE N)
DATA N
DB7 TO DB0
DATA N
DB11 TO DB8
(SAMPLE N + 1)
DATA N
DB11 TO DB0
t
CONV
Figure 17. ROM Mode Timing
20
LTC1274/LTC1277
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX
: (408) 434-0507
●
TELEX
: 499-3977
© LINEAR TECHNOLOGY CORPORATION 1995
LT/GP 1195 10K • PRINTED IN USA
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Dimensions in inches (millimeters) unless otherwise noted.
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
LTC1272 12-Bit, 3µs, 250kHz Sampling A/D Converter Single 5V, Sampling 7572 Upgrade
LTC1273/75/76 12-Bit, 300ksps Sampling A/D Converters with Reference Complete with Clock, Reference
LTC1278 12-Bit, 500ksps Sampling A/D Converter with Shutdown 70dB SINAD at Nyquist, Low Power
LTC1279 12-Bit, 600ksps Sampling A/D Converter with Shutdown 70dB SINAD at Nyquist, Low Power
LTC1282 12-Bit, 140ksps Sampling A/D Converter with Reference 3V or ±3V ADC with Reference, Clock
LTC1409 12-Bit, 800ksps Sampling A/D Converter with Shutdown Fast, Complete Low Power ADC, 80mV
LTC1410 12-Bit, 1.25Msps Sampling A/D Converter with Shutdown Fast, Complete Wideband ADC, 160mV
In the Sleep mode, the comparator of the ADC will start
consuming power after the rising edge of SLEEP as shown
in Figure 18a. If REFRDY is tied to NAP, the comparator will
be powered up after REFRDY’s rising edge. Hence more
power will be saved as in Figure 18b.
REFRDY
COMPARATOR
STATUS
ON OFF ON
LTC1274/77 • F18a
SLEEP
3ms
(C
REF
= 4.7µF)
NAP = REFRDY
COMPARATOR
STATUS
ON OFF ON
LTC1274/77 • F18b
SLEEP
3ms
(C
REF
= 4.7µF)
Figure 18a. Power Saved in Sleep Mode (NAP = HIGH) Figure 18b. Power Saved in Sleep Mode (NAP = REFRDY)
SW Package
24-Lead Plastic Small Outline (Wide 0.300)
(LTC DWG # 05-08-1620)
NOTE 1
0.598 – 0.614*
(15.190 – 15.600)
22 21 20 19 18
17
16 15
1
23
4
5
6
78
0.394 – 0.419
(10.007 – 10.643)
910
1314
11 12
2324
0.037 – 0.045
(0.940 – 1.143)
0.004 – 0.012
(0.102 – 0.305)
0.093 – 0.104
(2.362 – 2.642)
0.050
(1.270)
TYP
0.014 – 0.019
(0.356 – 0.482)
0° – 8° TYP
NOTE 1
0.009 – 0.013
(0.229 – 0.330)
0.016 – 0.050
(0.406 – 1.270)
0.291 – 0.299**
(7.391 – 7.595)
×
45
°
0.010 – 0.029
(0.254 – 0.737)
NOTE:
1. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS
THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS.
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
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LTC1274CSW#PBF

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Buy LTC1274CSW#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-B, 10mW, 100ksps ADCs w/ 1 A SD
Lifecycle:
New from this manufacturer.
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