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CBT3306GT,115

P1-P3P4-P6P7-P9P10-P12P13-P15
CBT3306 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 1 May 2012 3 of 14
NXP Semiconductors
CBT3306
Dual bus switch
6.2 Pin description
7. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state.
8. Limiting values
[1] Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under Section 9.
is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability.
[2] The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
9. Recommended operating conditions
Table 3. Pin description
Symbol Pin Description
1OE
, 2OE 1, 7 output enable input
1A, 2A 2, 5 data input/output (A port)
1B, 2B 3, 6 data input/output (B port)
GND 4 ground (0 V)
V
CC
8 positive supply voltage
Table 4. Function selection
[1]
Input Input/output
nOE nA, nB
LnA = nB
HZ
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
[1]
T
amb
=
40
C to +85
C, unless otherwise specified.
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage 0.5 +7.0 V
V
I
input voltage
[2]
0.5 +7.0 V
I
O
output current - 128 mA
I
IK
input clamping current V
I/O
=0V 50 - mA
T
stg
storage temperature 65 +150 C
Table 6. Operating conditions
All unused control inputs of the device must be held at V
CC
or GND to ensure proper device operation.
Symbol Parameter Conditions Min Typ Max Unit
V
CC
supply voltage 4.5 - 5.5 V
V
IH
HIGH-level input voltage 2.0 - - V
V
IL
LOW-level input voltage - - 0.8 V
T
amb
ambient temperature operating in free air 40 - +85 C
CBT3306 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 1 May 2012 4 of 14
NXP Semiconductors
CBT3306
Dual bus switch
10. Static characteristics
[1] All typical values are at V
CC
=5V, T
amb
=25C.
[2] This is the increase in supply current for each input that is at the specified TTL voltage level rather than V
CC
or GND.
[3] Measured by the voltage drop between the nA and the nB terminals at the indicated current through the switch. ON resistance is
determined by the lowest voltage of the two (nA, nB) terminals.
11. Dynamic characteristics
[1] The propagation delay is the calculated RC time constant of the typical ON resistance of the switch and the specified load capacitance,
when driven by an ideal voltage source (zero output impedance).
[2] t
pd
is the same as t
PLH
and t
PHL
.
t
en
is the same as t
PZL
and t
PZH
.
t
dis
is the same as t
PLZ
and t
PHZ
.
Table 7. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C Unit
Min Typ
[1]
Max
V
IK
input clamping voltage V
CC
=4.5V; I
I
= 18 mA - - 1.2 V
I
I
input leakage current V
CC
=5.5V; V
I
= GND or 5.5 V - - 1 A
I
CC
supply current V
CC
=5.5V; I
O
=0mA;
V
I
=V
CC
or GND
--3A
V
pass
pass voltage output HIGH; V
I
=V
CC
=5.0V;
I
O
= 100 A
3.6 3.9 4.2 V
I
CC
additional supply current per input pin; V
CC
=5.5V;
one input at 3.4 V, other inputs at
V
CC
or GND
[2]
--2.5mA
C
I
input capacitance control pin; V
I
=3V or 0V - 3.15 - pF
C
io(off)
off-state input/output
capacitance
port off; V
I
= 3 V or 0 V; nOE =V
CC
-6.45-pF
R
ON
ON resistance V
CC
=4.5V; V
I
=0V; I
I
=64mA
[3]
-3.45
V
CC
=4.5V; V
I
=0V; I
I
=30mA
[3]
-3.45
V
CC
=4.5V; V
I
=2.4V; I
I
=15mA
[3]
-6.815
Table 8. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 8.
Symbol Parameter Conditions 40 C to +85 C Unit
Min Typ Max
t
pd
propagation delay nA, nB to nB, nA; see Figure 6
[1][2]
- - 0.25 ns
V
CC
= 5.0 V 0.5 V
t
en
enable time nOE to nA, nB; see Figure 7
[2]
1.0 - 5.0 ns
V
CC
= 5.0 V 0.5 V
t
dis
disable time nOE to nA, nB; see Figure 7
[2]
1.0 - 5.0 ns
V
CC
= 5.0 V 0.5 V
CBT3306 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved.
Product data sheet Rev. 7 — 1 May 2012 5 of 14
NXP Semiconductors
CBT3306
Dual bus switch
12. Waveforms
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 6. The data input (nA, nB) to output (nB, nA) propagation delay times
001aak305
t
PLH
t
PHL
V
M
V
M
nB, nA
output
nA, nB
input
V
I
GND
V
OH
V
OL
Measurement points are given in Table 9.
Logic levels: V
OL
and V
OH
are typical output voltage levels that occur with the output load.
Fig 7. Enable and disable times
001aak298
t
PLZ
t
PHZ
outputs
disabled
outputs
enabled
V
Y
V
X
outputs
enabled
output
LOW to OFF
OFF to LOW
output
HIGH to OFF
OFF to HIGH
nOE input
V
I
3.5 V
V
M
V
M
V
OL
V
OH
GND
GND
t
PZL
t
PZH
V
M
V
M
Table 9. Measurement points
Supply voltage Input Output
V
CC
V
I
V
M
V
M
V
X
V
Y
V
CC
= 5.0 V 0.5 V GND to 3.0 V 1.5 V 1.5 V V
OL
+ 0.3 V V
OH
0.3 V
P1-P3P4-P6P7-P9P10-P12P13-P15

CBT3306GT,115

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Buy CBT3306GT,115
Manufacturer:
Nexperia
Description:
Digital Bus Switch ICs Dual 15Ohms 5.5V
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New from this manufacturer.
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