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EL4581CSZ-T7

P1-P3P4-P6P7-P9P10-P10
1
®
FN7172.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or
1-888-468-3774 |Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
Copyright © Intersil Americas Inc. 2003, 2008, 2010. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc.
All other trademarks mentioned are the property of their respective owners. Manufactured under U.S. Patent 5,528,303.
EL4581
Sync Separator, 50% Slice, S-H, Filter
The EL4581 extracts timing
information from standard negative
going video sync found in NTSC, PAL
and SECAM broadcast systems. It can also be used in non
standard formats and with computer graphics systems at
higher scan rates, by adjusting a single external resistor.
When the input does not have correct serration pulses in the
vertical interval, a default vertical output is produced.
Outputs are composite sync, vertical sync, burst/back porch
output, and odd/even output. The later operates only in
interlaced scan formats.
The EL4581 provides a reliable method of determining
correct sync slide level by setting it to the mid-point between
sync tip and blanking level at the back porch. This 50% level
is determined by two internal self timing sample and hold
circuits that track sync tip and back porch levels. This also
provides a degree of hum and noise rejection to the input
signal, and compensates for varying input levels of 0.5V
P-P
to 2.0V
P-P
.
A built in linear phase, third order, low pass filter attenuates
the chroma signal in color systems to prevent incorrectly set
color burst from disturbing the 50% sync slide.
This device may be used to replace the industry standard
LM1881, offering improved performance and reduced power
consumption.
The EL4581 video sync separator is manufactured using
Elantec’s high performance analog CMOS process.
Pinout
EL4581
(8 LD SOIC, PDIP)
TOP VIEW
Features
• NTSC, PAL and SECAM sync separation
• Single supply, +5V
• Precision 50% slicing, internal caps
• Built-in color burst filter
• Decodes non-standard verticals
• Pin compatible with LM1881
• Low power
• Typically 1.5mA supply current
• Resistor programmable scan rate
• Few external components
• Available in 8 Ld PDIP and SOIC packages
• Pb-free available (RoHS compliant)
Applications
• Video special effects
• Video test equipment
• Video distribution
• Displays
•Imaging
• Video data capture
• Video triggers
Demo Board
A dedicated demo board is not available. However, this
device can be placed on the EL4584/5 Demo Board.
1
2
3
4
8
7
6
5
COMPOSITE
SYNC OUT
COMPOSITE
VIDEO IN
VERTICAL
SYNC OUT
GND
VDD 5V
ODD/EVEN OUTPUT
RSET
BURST/BACK
PORCH OUTPUT
Ordering Information
PART
NUMBER
PART
MARKING TEMP. RANGE PACKAGE
PKG.
DWG. #
EL4581CN EL4581CN -40°C to +85°C 8 Ld PDIP MDP0031
EL4581CS* 4581CS -40°C to +85°C 8 Ld SOIC MDP0027
EL4581CSZ*
(Note)
4581CSZ -40°C to +85°C 8 Ld SOIC
(Pb-free)
MDP0027
*Add “-T7” or “-T13” suffix for tape and reel. Please refer to TB347 for
details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special
Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS
compliant and compatible with both SnPb and Pb-free soldering
operations. Intersil Pb-free products are MSL classified at Pb-free peak
reflow temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
Data Sheet November 12, 2010
2
FN7172.2
November 12, 2010
Absolute Maximum Ratings (T
A
= +25°C) Thermal Information
V
CC
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
CC
+0.5V
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . .-40°C to +85°C
Maximum Power Dissipation. . . . . . . . . . . . . . . . . . . . . . . . . See Curves
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications Unless otherwise stated, V
DD
= 5V, T
A
= +25°C, R
SET
= 680kΩ.
PARAMETER DESCRIPTION TEMP (°C)
MIN
(Note 7) TYP
MAX
(Note 7) UNIT
I
DD
V
DD
= 5V (Note 1) +25 0.75 1.7 3 mA
Clamp Voltage Pin 2, Unloaded +25 1.3 1.5 1.9 V
Discharge Current Pin 2 = 2V +25 6 10 20 µA
Clamp Charge Current Pin 2, V
IN
= 1V +25 2 3 mA
Ref Voltage Pin 6, V
DD
= 5V (Note 2) +25 1.5 1.8 2.1 V
V
OL
Output Low Voltage I
OL
= 1.6mA +25 800 mV
V
OH
Output High Voltage I
OH
= -40µA +25 4 V
I
OH
= -1.6mA +25 2.4 V
NOTES:
1. No video signal, outputs unloaded.
2. Tested for V
DD
5V ±5%.
Dynamic Specifications V
DD
= 5V, IV
P-P
video, T
A
= +25°C, C
L
= 15pF, I
OH
= -1.6mA, I
OL
= 1.6mA. Signal voltages are peak to peak.
PARAMETER DESCRIPTION TEMP (°C)
MIN
(Note 7) TYP
MAX
(Note 7) UNIT
Vertical Sync Width, t
VS
(Note 3) +25 190 230 300 µs
Burst/Back Porch Width, t
B
(Note 3) +25 2.5 3.5 4.5 µs
Vertical Sync Default Delay t
VSD
+25405570µs
Filter Attenuation F
IN
= 3.4MHz (Note 4) +25 24 dB
Composite Sync Prop Delay V
IN
- Composite Sync (Note 3) +25 260 400 ns
Input Dynamic Range Peak-to-Peak NTSC Signal (Note 5) +25 0.5 2 V
Slice Level Input Voltage = 1V
P-P
+25405060%
(Note 6) Full 40 50 60 %
NOTES:
3. C/S, Vertical and Burst outputs are all active low (V
OH
= 2.4V, V
OL
= 0.8V).
4. Attenuation is a function of R
SET
(PIN 6).
5. Typical min is 0.3V
P-P
.
6. Refers to threshold level of sync tip to back porch amplitude.
7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
EL4581
3
FN7172.2
November 12, 2010
Pin Descriptions
PIN NUMBER PIN NAME FUNCTION
1 Composite Sync Out Composite sync pulse output. Sync pulses start on a falling edge and end on a rising edge.
2 Composite Video in AC coupled composite video input. Sync tip must be at the lowest potential (Positive picture phase).
3 Vertical Sync Out Vertical sync pulse output. The falling edge of Vert Sync is the start of the vertical period.
4 GND Supply ground.
5 Burst/Back Porch Output Burst/Back porch output. Low during burst portion of composite video.
6 RSET (Note 8) An external resistor to ground sets all internal timing. 681k, 1% resistor will provide correct timing
for NTSC signals.
7 Odd/Even Output Odd/Even field output. Low during odd fields, high during even fields. Transitions occur at start of
Vert Sync pulse.
8 VDD 5V Positive supply. (5V)
NOTE:
8. R
SET
must be a 1% resistor.
Typical Performance Curves
FIGURE 1. R
SET
vs HORIZONTAL FREQUENCY FIGURE 2. BACK PORCH CLAMP, ON-TIME vs R
SET
FIGURE 3. VERTICAL PULSE WIDTH vs R
SET
FIGURE 4. VERTICAL DEFAULT DELAY, TIME vs R
SET
FIGURE 5. VERTICAL PULSE WIDTH vs TEMPERATURE FIGURE 6. SUPPLY CURRENT vs TEMPERATURE
1000
900
800
700
600
500
400
300
200
100
10 15 20 25 30 35 40 45 50
FREQUENCY (kHz)
R
SET
(kΩ)
CLAMP TIME (µs)
0246810
200
400
600
800
1000
0
R
SET
(kΩ)
200
400
600
800
1000
0
0 200 400100 300 500
VERTICAL PULSE WIDTH (µs)
R
SET
(kΩ)
200
400
600
800
1000
0
R
SET
(kΩ)
DELAY TIME (µs)
0408020 60 100
150
200
250
300
350
PULSE WIDTH (µs)
-55 5 65-25 35 95 125
TEMPERATURE (°C)
0.5
1.0
1.5
2.0
-55 5 65-25 35 95 125
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
EL4581
P1-P3P4-P6P7-P9P10-P10

EL4581CSZ-T7

Mfr. #:
Buy EL4581CSZ-T7
Manufacturer:
Renesas / Intersil
Description:
Video ICs SYNC SEP 50% SLICER W/FILTER
Lifecycle:
New from this manufacturer.
Delivery:
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