CY28419
Rev 1.0, November 22, 2006 Page 13 of 15
PCI / PCIF
T
DC
PCIF and PCI Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.0009 ns
T
PERIOD
Spread Enabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.1598 ns
T
HIGH
PCIF and PCI High Time Measurement at 2.0V 12.0 nS
T
LOW
PCIF and PCI Low Time Measurement at 0.8V 12.0 nS
T
R
/ T
F
PCIF and PCI rise and fall times Measured between 0.8V and 2.0V 0.5 2.0 nS
T
SKEW
Any PCI Clock to Any PCI Clock
Skew
Measurement at 1.5V
500 pS
T
CCJ
PCIF and PCI Cycle-to-Cycle Jitter Measurement at 1.5V 250 ps
DOT
T
DC
DOT Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
DOT Period Measurement at 1.5V 20.8257 20.8340 ns
T
HIGH
DOT High Time Measurement at 2.0V 8.994 10.486 nS
T
LOW
DOT Low Time Measurement at 0.8V 8.794 10.386 nS
T
R
/ T
F
Rise and Fall Times Measured between 0.8V and 2.0V 0.5 1.0 ns
T
LTJ
Long-term Jitter 10-µs period 2.0 ns
USB
T
DC
USB Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
USB Period Measurement at 1.5V 20.8257 20.8340 ns
T
HIGH
USB High Time Measurement at 2.0V 8.094 10.036 nS
T
LOW
USB Low Time Measurement at 0.8V 7.694 9.836 nS
T
R
/ T
F
Rise and Fall Times Measured between 0.8V and 2.0V 1.0 2.0 ns
T
LTJ
Long-term Jitter 125-µs period 6.0 ns
REF
T
DC
REF Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
REF Period Measurement at 1.5V 69.827 69.855 ns
T
R
/ T
F
REF Rise and Fall Times Measured between 0.8V and 2.0V 1.0 4.0 V/ns
T
CCJ
REF Cycle-to-Cycle Jitter Measurement at 1.5V 1000 ps
ENABLE/DISABLE and SET-UP
T
STABLE
Clock Stabilization from Power-up 1.8 ms
T
SS
Stopclock Set-up Time 10.0 ns
T
SH
Stopclock Hold Time 0 ns
AC Electrical Specifications (continued)
Parameter Description Conditions Min. Max. Unit
Table 7. Group Timing Relationship and Tolerances
Group Conditions
Offset
Min. Max.
3V66 to PCI 3V66 Leads PCI 1.5 ns 3.5 ns
Table 8. USB to DOT Phase Offset
Parameter Typical Value Tolerance
DOT Skew 0.0ns 1000 ps
USB Skew 180° 0.0ns 1000 ps
VCH SKew 0.0ns 1000 ps
Table 9. Maximum Lumped Capacitive Output Loads
Clock Max Load Unit
PCI Clocks 30 pF
3V66 Clocks 30 pF
USB Clock 20 pF
DOT Clock 10 pF
REF Clock 30 pF
CY28419
Rev 1.0, November 22, 2006 Page 14 of 15
Test and Measurement Set-up
For Differential CPU and SRC Output Signals
The following diagram shows lumped test load configurations
for the differential Host Clock Outputs.
C P U T
T
P C B
T
P C B
C P U C
3 3
3 3
4 9 .9
4 9 .9
M e a s u re m e n t
P o in t
2 p F
4 7 5
IR E F
M e a s u re m e n t
P o in t
2 p F
Figure 7. 0.7V Load Configuration
2.0V
0.8V
3.3V
0V
T r
T f
1.5V
3.3V sig n als
tD C
-
-
Figure 8. Lumped Load For Single-ended Output Signals (for AC Parameters Measurement)
Table 10.CPU Clock Current Select Function
Board Target Trace/Term Z Reference R, Iref – V
DD
(3*Rr) Output Current Voh @ Z
50 Ohms R
REF
= 475 1%, I
REF
= 2.32 mA Ioh = 6*Iref 0.7V @ 50
Ordering Information
Part Number Package Type Product Flow
CY28419OC 56-pin Shrunk Small Outline package (SSOP) Commercial, 0° to 70°C
CY28419OCT 56-pin Shrunk Small Outline package (SSOP) – Tape and Reel Commercial, 0° to 70°C
CY28419ZC 56-pin Thin Shrunk Small Outline package (TSSOP) Commercial, 0° to 70°C
CY28419ZCT 56-pin Thin Shrunk Small Outline package (TSSOP) – Tape and Reel Commercial, 0° to 70°C
Part Number Package Type - Lead Free Product Flow
CY28419OXC 56-pin Shrunk Small Outline package (SSOP) Commercial, 0° to 70°C
CY28419OXCT 56-pin Shrunk Small Outline package (SSOP) – Tape and Reel Commercial, 0° to 70°C
CY28419ZXC 56-pin Thin Shrunk Small Outline package (TSSOP) Commercial, 0° to 70°C
CY28419ZXCT 56-pin Thin Shrunk Small Outline package (TSSOP) – Tape and Reel Commercial, 0° to 70°C
Rev 1.0, November 22, 2006 Page 15 of 15
CY28419
While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc. assumes no responsibility for the use of any cir-
cuitry or for the infringement of any patents or other rights of third parties which would result from each use. This product is intended for use in
normal commercial applications and is not warranted nor is it intended for use in life support, critical medical instruments, or any other applica-
tion requiring extended temperature range, high reliability, or any other extraordinary environmental requirements unless pursuant to additional
processing by Spectra Linear Inc., and expressed written agreement by Spectra Linear Inc. Spectra Linear Inc. reserves the right to change any
circuitry or specification without notice.
Package Drawing and Dimensions
56-Lead Shrunk Small Outline Package O56
56-Lead Thin Shrunk Small Outline Package, Type II (6 mm x 14 mm) Z56

CY28419ZXCT

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Synthesizer / Jitter Cleaner Server, CK419
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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