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NCP5201MNG

P1-P3P4-P6P7-P9
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 11
1 Publication Order Number:
NCP5201/D
NCP5201
Dual Output
DDR Power Controller
The NCP5201 Dual DDR Power Controller is specifically
designed as a total power solution for a high current DDR memory
system. This IC combines the efficiency of a PWM controller for the
VDDQ supply with the simplicity of a linear regulator for the VTT
memory termination voltage. The secondary regulator (VTT) is
designed to automatically track at half the primary regulator voltage
(VDDQ). An internal power good voltage monitor tracks both
VDDQ and VTT outputs and notifies the user in the event of a fault
on either output. Protective features include soft−start circuitry and
undervoltage monitoring of VCC and VSTBY. The IC is packaged in
a 5 × 6 QFN−18.
Features
• Incorporates VDDQ, VTT Regulators
• Internal Switching Standby Regulator for VDDQ
• All External Power MOSFETs Are N−Channel
• Adjustable VDDQ
• VTT Tracks VDDQ/2
• Fixed Switching Frequency of 250 kHz for VDDQ in Normal Mode
• Doubled Switching Frequency (500 kHz) for Standby Mode
• Soft−Start Protection for VDDQ
• Undervoltage Monitor
• Short−Circuit Protection for Both VDDQ and VTT Outputs
• Housed in a space saving 5 × 6 QFN−18
• Pb−Free Packages are Available*
Typical Applications
• DDR Termination Voltage
• Active Termination Busses (SSTL−2, SSTL−3)
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
http://onsemi.com
Device Package Shipping
†
ORDERING INFORMATION
NCP5201MN 18−Lead QFN 61 Units / Rail
MARKING
DIAGRAM
PIN CONNECTIONS
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
18−LEAD QFN, 5 x 6 mm
MN SUFFIX
CASE 505
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
FBDDQ
FBVTT
PGND
VSTBY
VTT
VTT
OCDDQ
VDDQ
NC
SS
COMP
VCC
TGDDQ
BGDDQ
SDDQ
AGND
S3_EN
PWRGD
NCP5201MNR2 18−Lead QFN 2500/Tape & Re
el
1
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
NOTE: Pin 19 is the thermal pad on the bottom of
the device.
NCP5201
AWLYYWW G
G
1
NCP5201MNR2G 18−Lead QFN
(Pb−Free)
2500/Tape & Re
el
NCP5201MNG 61 Units / Rail18−Lead QFN
(Pb−Free)
(Note: Microdot may be in either location)
NCP5201
http://onsemi.com
2
5 VSTBY
VSTBY
PWRGD
SDDQ
BGDDQ
S3_EN
VDDQ
FBDDQ
4
11
8
1
17
18
12
7
C4
1.0 F
COMP
SS
C12
10 nF
C13
22 nF
5 V
AGND
OCDDQ
VTT
FBVTT
PGND
VTT
AGND
R10
1.1 k
C11
 nF
R12
20 k
C17
0.1 F
RL1
62 k
C10
100 nF
R6
16
R7
1.15 k
R2
10 k
R3
10 k
S3
16
C5
1.0 F
VCC
10
15
13
14
5
6
2
3
12 V
TGDDQ
C2
1.0 F
C1
1000 F
L1 1.0
H
R8 4.7
R1 4.7
R5 4.7
L2 2.2 H
++
AGND
C14
1000
F
C15
470
F
C15
1.0
F
VTT
VDD
Q
+
COUT
(1000
F
x3
)
NTD60N02R
NTD60N02R
NTD60N02R
S
D
D
S
Figure 1. Application Diagram
MAXIMUM RATINGS
Rating Symbol Value Unit
Power Supply Voltage (Pin 4) to PGND (Pin 3) and GND (Pin 12) VSTBY −0.3, 6.0 V
Power Supply Voltage, VCC (Pin 16) to PGND (Pin 3) and GND (Pin 12) VCC −0.3, 14 V
Gate Drive Voltage (Pins 14, 15) Vg −0.3 DC,
−4.0 for < 1.0 s; 14
V
Input/Output Pins (Pins 1, 2, 5−11, 13, 17−18) V
IO
−0.3, 6.0 V
Package Thermal Resistance, Junction−to−Ambient R
JA
35 °C/W
Operating Junction Temperature Range T
J
0 to +150 °C
Operating Ambient Temperature Range T
A
0 to +70 °C
Storage Temperature Range T
stg
−55 to +150 °C
Moisture Sensitivity Level MSL 2
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device series contains ESD protection and exceeds the following tests:
Human Body Model (HBM) ≤ 2.0 kV per JEDEC Standard JESD22−A114 except Pin 15 which is ≤ 1.5 kV.
Machine Model (MM) ≤ 200 V per JEDEC Standard JESD22−A115 except Pin 14 which is ≤ 100 V.
2. Latchup Current Maximum Rating: ≤ 150 mA per JEDEC Standard JESD78.
NCP5201
http://onsemi.com
3
ELECTRICAL CHARACTERISTICS (VSTBY = 5.0 V, VCC = 12 V, T
A
= 0 to 70°C, L2 = 1.7 H, COUT = 3770 F, COUT2 = 220 F,
RL1 = 100 k, R7 = 1.0 k, R10 = 1.0 k, R12 = 20 k, R6 = 16 , C12 = 3.0 nF, C11 = 6.0 nF, C10 = 80 nF, for min/max values unless
otherwise noted)
Characteristic Symbol Test Conditions Min Typ Max Unit
SUPPLY CURRENT
S0 Mode Supply Current from VSTBY IST_S0 S3_EN = LOW, VCC = 12 V − − 8.0 mA
S3 Mode Supply Current from VSTBY IST_S3 S3_EN = HIGH, VCC = 0 V − − 4.0 mA
S0 Mode Supply Current from VCC ICC_S0 EN = HIGH, VCC = 12 V,
2.0 nF Capacitive Load to TGDDQ
and BGDDQ
− − 30 mA
UNDERVOLTAGE MONITOR
VSTBY UVLO Lower Threshold VSBUV− − − 4.25 − V
Ratio of VSTBY UVLO Upper to
Lower Threshold
VSBUV+/
VSBUV−
− − 1.05 − −
VCC UV Monitor Lower Threshold VCCUV− − − 9.23 − V
Ratio of VCC UV Monitor Upper to
Lower Threshold
VCCUV+/
VCCUV−
− − 1.14 − −
VDDQ SWITCHING REGULATOR
FBDDQ Feedback Voltage,
Control Loop in Regulation
VFBQ T
A
= 25°C
T
A
= 0 to 70°C
1.271
1.264
1.300
−
1.326
1.333
V
V
Feedback Input Current Ifb V(FBDDQ) = 1.3 V − − 0.5 A
Oscillator Frequency in S0 Mode F − 225 250 275 kHz
OCDDQ Pin Current Sink IOC V(OCDDQ) = 4.0 V 6.0 10 14 A
Minimum Duty Cycle Dmin − 0 − − %
Maximum Duty Cycle Dmax − − − 100 %
Soft−Start Timing tss1 C
SS
= 33 nF 10 16 − ms
VDDQ STANDBY REGULATOR
FBDDQ Feedback Voltage, Control
Loop in Regulation
VFBQ T
A
= 25°C
T
A
= 0 to 70°C
1.281
1.274
1.300
−
1.319
1.326
V
V
Load Regulation LOADreg ILOAD from 50 mA to 650 mA − 0.4 − %
Peak Current Limit ILIMstbpk − − 2.0 − A
Peak Current Limit Blanking Time tbk − 400 − − ns
Oscillator Frequency in S3 Mode Fstb − − 500 − kHz
VDDQ ERROR AMPLIFIER
DC Gain GAIN − − 70 − dB
Unity Gain Bandwidth Ft COMP_GND = 200 nF, 1.0 in
series (Test circuit only)
− 2.0 − MHz
Slew Rate SR COMP_GND = 10 pF − 8.0 − V/s
VTT ACTIVE TERMINATOR
VTT Tracking VDDQ/2 at S0 Mode dVTT0 VDDQ/2 − VTT,
IOUT = 1.8 A (Sink Current)
IOUT = −1.8 A (Source Current)
−30
−
−
−
−
30
mV
mV
Source Current Limit ILIMVTsrc − − −2.3 − A
Sink Current Limit ILIMVTsnk − − 2.3 − A
3. Guaranteed by design, not tested in production.
P1-P3P4-P6P7-P9

NCP5201MNG

Mfr. #:
Buy NCP5201MNG
Manufacturer:
ON Semiconductor
Description:
IC REG CTRLR DDR 2OUT 18DFN
Lifecycle:
New from this manufacturer.
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