EZ80F910100KIT

eZ80F91 Modular Development Kit
QS004611-0810 Page 7 of 10
Bits per second: 57600
Data bits: 8
Parity: None
Stop bits: 1
Flow control: None
8. Click OK. HyperTerminal connects to your kit.
9. Launch ZDS II by navigating Start Programs Zilog ZDS II - eZ80Acclaim!
<Version> ZDS II - eZ80Acclaim! <Version>.
10. From the File menu in ZDS II, choose Open Project, and navigate to the
following
file path:
c:\Program Files\Zilog\ZDSII_eZ80Acclaim!_<Version>
\samples\StarterProject
11. Select the starter.zdsproj project within the above file path and click Open. A
list of source files appears in the Workspace panel.
12. Double-click the file
main.c in the Workspace panel to open the file in the ZDS II
editor window. Refer to the header of
main.c for details about the project.
13. Open the Build menu and select Set Active Configuration.
14. In the Select Configuration dialog box, select Debug.
15. Click OK to close the Select Configuration dialog box.
16. From the Project menu in ZDS II, select Settings. The Project Settings dialog box
appears. In the Project Settings dialog box, select the Debugger page.
17. In the Debugger page, select eZ80F91ModDevKit_RAM in the Target list.
18. In the Debugger page, select SerialSmartCable or USBSmartCable from the
Debug Tool drop-down menu.
19. Click OK to close the Project Settings dialog box.
20. If closing prompts you to rebuild the affected files, click Ye s. Otherwise, select Build
from the menu bar and click Rebuild All.
21. To run the application, select Debug Go. Until the default settings are changed, the
following output is viewed in the Hyperterminal window:
Zilog Developers Studio
i = 5
eZ80F91 Modular Development Kit
QS004611-0810 Page 8 of 10
d = 25
f = 1.260000
eZ80F91 5 25 1.260000
Viewing the Starter Project Output via the ZDS II Cycle-Accurate
Simulator (Optional)
Follow the steps below to view the output of the starter.zdsproj project in the ZDS II
cycle-accurate simulator:
1. In ZDS II, open the
starter.zdsproj project.
2. Select Settings from the Project menu in ZDS II. The Project Settings dialog box
appears. In the Project Settings dialog box, select the Debugger page.
3. In the Debugger page, select eZ80F91ModDevKit_RAM in the Target window by
checking the box next to the specific Target Name.
4. In the Debugger page, select Simulator from the Debug Tool drop-down menu.
5. Click OK to close the Project Settings dialog box.
6. If closing prompts you to rebuild the affected files, click Ye s. Otherwise, select Build
from the menu bar and click Rebuild All.
7. When the build is complete, explore the Debug toolbar for the various debugger fea-
tures. To connect to the simulator, select Debug Reset.
8. Open the Simulated UART Output window to view the output of the program.
Select View Debug Windows Simulated UART Output.
9. To run the application, select Debug Go.
10. Until the default settings are changed, the following output is viewed in the Simulated
UART Output window:
Zilog Developers Studio
i = 5
d = 25
f = 1.260000
eZ80F91 5 25 1.260000
11. Using the cycle-accurate simulator, you can view the sample code to study how it
works.
You can obtain a sample Zilog ZTP web application and an embedded security
SSL application by following the instructions on your kit registration card.
Note:
eZ80F91 Modular Development Kit
QS004611-0810 Page 9 of 10
Related Documentation
For complete details on developing an application for the modular development kit, refer
to the following documents:
Zilog Developer Studio II–eZ80Acclaim!
®
User Manual (UM0144)
eZ80F91 Modular Development Kit User Manual (UM0170)
Zilog TCP/IP Software Suite Quick Start Guide (QS0049)
ZTP Network Security Plug-In (SSL) Quick Start Guide (QS0059)
eZ80F91 MCU Product Specification (PS0192)

EZ80F910100KIT

Mfr. #:
Manufacturer:
ZiLOG
Description:
Development Boards & Kits - Other Processors EZ80F91 Acclaim Kit
Lifecycle:
New from this manufacturer.
Delivery:
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