LTC4008
10
4008fb
OPERATION
Input FET (LTC4008)
The input FET circuit performs two functions. It enables
the charger if the input voltage is higher than the CLP
pin and provides the logic indicator of AC present on the
ACP/SHDN pin. It controls the gate of the input FET to
keep a low forward voltage drop when charging and also
prevents reverse current fl ow through the input FET.
If the input voltage is less than V
CLP
, it must go at least
170mV higher than V
CLN
to activate the charger. When this
occurs the ACP/SHDN pin is released and pulled up with
an external load to indicate that the adapter is present.
The gate of the input FET is driven to a voltage suffi cient
to keep a low forward voltage drop from drain to source.
If the voltage between DCIN and CLP drops to less than
25mV, the input FET is turned off slowly. If the voltage
between DCIN and CLP is ever less than –25mV, then
the input FET is turned off in less than 10μs to prevent
signifi cant reverse current from fl owing in the input FET.
In this condition, the ACP/SHDN pin is driven low and the
charger is disabled.
Input FET (LTC4008-1)
The input FET circuit is disabled for the LTC4008-1. There
is no low current shutdown mode when DCIN falls below
the CLP pin. The ACP/SHDN pin functions only to shut
down the charger.
Battery Charger Controller
The LTC4008 charger controller uses a constant off-time,
current mode step-down architecture. During normal
operation, the top MOSFET is turned on each cycle when
the oscillator sets the SR latch and turned off when the
main current comparator I
CMP
resets the SR latch. While
the top MOSFET is off, the bottom MOSFET is turned on
until either the inductor current trips the current compara-
tor I
REV
or the beginning of the next cycle. The oscillator
uses the equation:
t
VV
Vf
OFF
DCIN BAT
DCIN OSC
=
–
•
to set the bottom MOSFET on time. This activity is dia-
grammed in Figure 1.
The peak inductor current, at which I
CMP
resets the SR
latch, is controlled by the voltage on I
TH
. I
TH
is in turn
controlled by several loops, depending upon the situation
at hand. The average current control loop converts the
voltage between CSP and BAT to a representative cur-
rent. Error amp CA2 compares this current against the
desired current programmed by R
PROG
at the PROG pin
and adjusts I
TH
until:
V
R
VV Ak
k
REF
PROG
CSP BAT
=
+μ Ω
Ω
–.•.
.
11 67 3 01
301
therefore,
I
V
R
A
k
R
CHARGE MAX
REF
PROG SENSE
()
–. •
.
=μ
⎛
⎝
⎜
⎞
⎠
⎟
Ω
11 67
301
The voltage at BATMON is divided down by an external
resistor divider and is used by error amp EA to decrease
I
TH
if the divider voltage is above the 1.19V reference.
When the charging current begins to decrease, the voltage
at PROG will decrease in direct proportion. The voltage at
PROG is then given by:
VI R Ak
R
k
PROG CHARGE SENSE
PROG
=+μΩ
()
Ω
•.•.•
.
11 67 3 01
301
The accuracy of V
PROG
will range from 0% to I
TOL
.
V
PROG
is plotted in Figure 2.
The amplifi er CL1 monitors and limits the input current,
normally from the AC adapter to a preset level (100mV/R
CL
).
At input current limit, CL1 will decrease the I
TH
voltage,
thereby reducing charging current. The I
CL
indicator output
will go low when this condition is detected and the FLAG
indicator will be inhibited if it is not already low.
TGATE
OFF
ON
BGATE
INDUCTOR
CURRENT
t
OFF
TRIP POINT SET BY ITH VOLTAGE
ON
OFF
4008 F01
Figure 1
