LTC4008
16
4008fb
APPLICATIONS INFORMATION
Selection criteria for the power MOSFETs include the “ON”
resistance R
DS(ON)
, total gate capacitance Q
G
, reverse
transfer capacitance C
RSS
, input voltage and maximum
output current. The charger is operating in continuous
mode so the duty cycles for the top and bottom MOSFETs
are given by:
Main Switch Duty Cycle = V
OUT
/V
IN
Synchronous Switch Duty Cycle = (V
IN
– V
OUT
)/V
IN
.
The MOSFET power dissipations at maximum output
current are given by:
PMAIN = V
OUT
/V
IN(IMAX)
2
(1 + δΔT)R
DS(ON)
+ k(V
IN
)
2
(I
MAX
)(C
RSS
)(f
OSC
)
PSYNC = (V
IN
– V
OUT
)/V
IN
(I
MAX
)
2
(1 + δΔT)R
DS(ON)
Where δΔT is the temperature dependency of R
DS(ON)
and
k is a constant inversely related to the gate drive current.
Both MOSFETs have I
2
R losses while the PMAIN equation
includes an additional term for transition losses, which
are highest at high input voltages. For V
IN
< 20V the high
current effi ciency generally improves with larger MOSFETs,
while for V
IN
> 20V the transition losses rapidly increase to
the point that the use of a higher R
DS(ON)
device with lower
C
RSS
actually provides higher effi ciency. The synchronous
MOSFET losses are greatest at high input voltage or during
a short circuit when the duty cycle in this switch in nearly
100%. The term (1 + δΔT) is generally given for a MOSFET
in the form of a normalized R
DS(ON)
vs temperature curve,
but δ = 0.005/°C can be used as an approximation for low
voltage MOSFETs. C
RSS
= Q
GD
/ΔV
DS
is usually specifi ed
in the MOSFET characteristics. The constant k = 2 can be
used to estimate the contributions of the two terms in the
main switch dissipation equation.
If the charger is to operate in low dropout mode or with
a high duty cycle greater than 85%, then the topside P-
channel effi ciency generally improves with a larger MOSFET.
Using asymmetrical MOSFETs may achieve cost savings
or effi ciency gains.
The Schottky diode D1, shown in the Typical Application
on the back page, conducts during the dead-time between
the conduction of the two power MOSFETs. This prevents
the body diode of the bottom MOSFET from turning on and
storing charge during the dead-time, which could cost as
much as 1% in effi ciency. A 1A Schottky is generally a good
size for 4A regulators due to the relatively small average
current. Larger diodes can result in additional transition
losses due to their larger junction capacitance.
The diode may be omitted if the effi ciency loss can be
tolerated.
Calculating IC Power Dissipation
The power dissipation of the LTC4008 is dependent upon
the gate charge of the top and bottom MOSFETs (Q
G1
&
Q
G2
respectively) The gate charge is determined from the
manufacturers data sheet and is dependent upon both
the gate voltage swing and the drain voltage swing of the
MOSFET. Use 6V for the gate voltage swing and V
DCIN
for
the drain voltage swing.
PD = V
DCIN
• (f
OSC
(Q
G1
+ Q
G2
) + I
Q
)
Example:
V
DCIN
= 19V, f
OSC
= 345kHz, Q
G1
= Q
G2
= 15nC,
I
Q
= 5mA
PD = 292mW
Adapter Limiting
An important feature of the LTC4008 is the ability to auto-
matically adjust charging current to a level which avoids
overloading the wall adapter. This allows the product to
operate at the same time that batteries are being charged
without complex load management algorithms. Addition-
ally, batteries will automatically be charged at the maximum
possible rate of which the adapter is capable.
This feature is created by sensing total adapter output cur-
rent and adjusting charging current downward if a preset
adapter current limit is exceeded. True analog control is
LTC4008
17
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APPLICATIONS INFORMATION
used, with closed-loop feedback ensuring that adapter load
current remains within limits. Amplifi er CL1 in Figure 7
senses the voltage across R
CL
, connected between the
CLP and CLN pins. When this voltage exceeds 100mV,
the amplifi er will override programmed charging current
to limit adapter current to 100mV/R
CL
. A lowpass fi lter
formed by 5kΩ and 15nF is required to eliminate switch-
ing noise. If the current limit is not used, CLN should be
connected to CLP.
Note that the I
CL
pin will be asserted when the voltage
across R
CL
is 93mV, before the adapter limit regulation
threshold.
+
CLP
15nF
5k
R
CL
*
V
IN
LTC4008
16
CLN
100mV
15
4008 F07
C
IN
TO
SYSTEM
LOAD
CL1
*R
CL
=
100mV
ADAPTER CURRENT LIMIT
+
Figure 7. Adapter Current Limiting
Setting Input Current Limit
To set the input current limit, you need to know the mini-
mum wall adapter current rating. Subtract 7% for the input
current limit tolerance and use that current to determine
the resistor value.
R
CL
= 100mV/I
LIM
I
LIM
= Adapter Min Current –
(Adapter Min Current • 7%)
Table 5. Common R
CL
Resistor Values
ADAPTER
RATING (A)
R
CL
VALUE*
(Ω) 1%
R
CL
POWER
DISSIPATION (W)
R
CL
POWER
RATING (W)
1.5 0.06 0.135 0.25
1.8 0.05 0.162 0.25
2 0.045 0.18 0.25
2.3 0.039 0.206 0.25
2.5 0.036 0.225 0.5
2.7 0.033 0.241 0.5
3 0.03 0.27 0.5
*Values shown above are rounded to nearest standard value.
As is often the case, the wall adapter will usually have at
least a +10% current limit margin and many times one
can simply set the adapter current limit value to the actual
adapter rating (see Table 5).
Designing the Thermistor Network
There are several networks that will yield the desired
function of voltage vs temperature needed for proper
operation of the thermistor. The simplest of these is the
voltage divider shown in Figure 8. Unfortunately, since
the HIGH/LOW comparator thresholds are fi xed internally,
there is only one thermistor type that can be used in this
network; the thermistor must have a HIGH/LOW resistance
ratio of 1:7. If this happy circumstance is true for you, then
simply set R9 = R
TH(LOW)
LTC4008
NTC
R9
C7 R
TH
4008 F08
8
Figure 8. Voltage Divider Thermistor Network
LTC4008
18
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APPLICATIONS INFORMATION
If you are using a thermistor that doesn’t have a 1:7
HIGH/LOW ratio, or you wish to set the HIGH/LOW limits
to different temperatures, then the more generic network
in Figure 9 should work.
Once the thermistor, R
TH
, has been selected and the
thermistor value is known at the temperature limits, then
resistors R9 and R9A are given by:
For NTC thermistors:
R9 = 6 R
TH(LOW)
• R
TH(HIGH)
/(R
TH(LOW)
– R
TH(HIGH)
)
R9A = 6 R
TH(LOW)
• R
TH(HIGH)
/(R
TH(LOW)
– 7 • R
TH(HIGH)
)
Where R
TH(LOW)
> 7 • R
TH(HIGH)
For PTC thermistors:
R9 = 6 R
TH(LOW)
• R
TH(HIGH)
/(R
TH(HIGH)
– R
TH(LOW)
)
R9A = 6 R
TH(LOW)
• R
TH(HIGH)
/(R
TH(HIGH)
– 7 • R
TH(LOW)
)
Where R
TH(HIGH)
> 7 • R
TH(LOW)
Example #1: 10kΩ NTC with custom limits
TLOW = 0°C, THIGH = 50°C
R
TH
= 10k at 25°C,
R
TH(LOW)
= 32.582k at 0°C
R
TH(HIGH)
= 3.635k at 50°C
R9 = 24.55k 24.3k (nearest 1% value)
R9A = 99.6k 100k (nearest 1% value)
Figure 9. General Thermistor Network
LTC4008
NTC
R9
C7 R9A R
TH
4008 F09
8
Example #2: 100kΩ NTC
TLOW = 5°C, THIGH = 50°C
R
TH
= 100k at 25°C,
R
TH(LOW)
= 272.05k at 5°C
R
TH(HIGH)
= 33.195k at 50°C
R9 = 226.9k 226k (nearest 1% value)
R9A = 1.365M 1.37M (nearest 1% value)
Example #3: 22kΩ PTC
TLOW = 0°C, THIGH = 50°C
R
TH
= 22k at 25°C,
R
TH(LOW)
= 6.53k at 0°C
R
TH(HIGH)
= 61.4k at 50°C
R9 = 43.9k 44.2k (nearest 1% value)
R9A = 154k
Sizing the Thermistor Hold Capacitor
During the hold interval, C7 must hold the voltage across
the thermistor relatively constant to avoid false readings.
A reasonable amount of ripple on NTC during the hold
interval is about 10mV to 15mV. Therefore, the value of
C7 is given by:
C7 = t
HOLD
/(R9/7 • – ln(1 – 8 • 15mV/4.5V))
= 10 • R
RT
• 17.5pF/(R9/7 • – ln(1 – 8 • 15mV/4.5V)
Example:
R9 = 24.3k
R
RT
= 150k
C7 = 0.28μF 0.27μF (nearest value)

LTC4008EGN#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Battery Management 4A, High Efficiency Li-Ion Charger
Lifecycle:
New from this manufacturer.
Delivery:
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