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MC100EL1648MNR4G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
MC100EL1648
http://onsemi.com
10
WAVE−FORM CONDITIONING − SINE OR SQUARE WAVE
The peak−to−peak swing of the tank circuit is set
internally by the AGC pin. Since the voltage swing of the
tank circuit provides the drive for the output buffer, the AGC
potential directly affects the output waveform. If it is desired
to have a sine wave at the output of the MC100EL1648, a
series resistor is tied from the AGC point to the most
negative power potential (ground if positive volt supply is
used, −5.2 V if a negative supply is used) as shown in
Figure 13. At frequencies above 100 MHz typical, it may be
desirable to increase the tank circuit peak−to−peak voltage
in order to shape the signal into a more square waveform at
the output of the MC100EL1648. This is accomplished by
tying a series resistor (1.0 kW minimum) from the AGC to
the most positive power potential (+5.0 V if a positive volt
supply is used, ground if a −5.2 V supply is used). Figure 14
illustrates this principle.
Figure 13. Method of Obtaining a Sine−Wave Output
10
12
78
3
5
Output
+5.0Vdc
114
Figure 14. Method of Extending the Useful Range
of the MC100EL1648 (Square Wave Output)
10
12
78
3
5
Output
+5.0Vdc
114
1.0k min
MC100EL1648
http://onsemi.com
11
SPECTRAL PURITY
B.W. = 10 kHz, Center Frequency = 100 MHz
Scan Width = 50 kHz/div, Vertical Scale = 10 dB/div
99.8 99.9 100.0 100.1 100.2
Figure 15. Spectral Purity
10 dB / DEC
Figure 16. Spectral Purity of Signal Output for 200 MHz Testing
0.1 mF
1200*
C
L
8 (10)
1 (12)
5 (5)
4 (3)
SIGNAL
UNDER
TEST
10 mF0.1 mF
3(1)2 (14)
6 (7) 7 (8)
Spectral Purity Test Circuit
Tank #3
L = Micro Metal torroid #T20−22, 8 turns #30
Enameled Copper wire (@ 40 nH)
C = 3.0−35 pF Variable Capacitance (@ 10 pF)
** The 1200 W resistor and the scope termination
impedance constitute a 25:1 attenuator probe.
Coax shall be CT−070−50 or equivalent.
8 pin (14 pin) Lead Package
V
EE
0.1 mF 0.1 mF0.01 mF100 mF
Figure 17. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
− 2.0 V
MC100EL1648
http://onsemi.com
12
ORDERING INFORMATION
Device Package Shipping
†
MC100EL1648D SOIC−8, Narrow Body 98 Units / Rail
MC100EL1648DG SOIC−8, Narrow Body
(Pb−Free)
98 Units / Rail
MC100EL1648DR2 SOIC−8, Narrow Body 2500 / Tape & Reel
MC100EL1648DR2G SOIC−8, Narrow Body
(Pb−Free)
2500 / Tape & Reel
MC100EL1648DT TSSOP−8 100 Units / Rail
MC100EL1648DTG TSSOP−8
(Pb−Free)
100 Units / Rail
MC100EL1648DTR2 TSSOP−8 2500 / Tape & Reel
MC100EL1648DTR2G TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC100EL1648M SOEAIJ−14 50 Units / Rail
MC100EL1648MG SOEAIJ−14
(Pb−Free)
50 Units / Rail
MC100EL1648MEL SOEAIJ−14 2000 / Tape & Reel
MC100EL1648MELG SOEAIJ−14
(Pb−Free)
2000 / Tape & Reel
MC100EL1648MNR4 DFN8 1000 / Tape & Reel
MC100EL1648MNR4G DFN8
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D −
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

MC100EL1648MNR4G

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Buy MC100EL1648MNR4G
Manufacturer:
ON Semiconductor
Description:
Bipolar Transistors - BJT BBG ECL LOW PWER VCO
Lifecycle:
New from this manufacturer.
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